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dc.contributor.authorChaparro, Pedro
dc.contributor.authorMagklis, Grigorios
dc.contributor.authorGonzález González, José
dc.contributor.authorGonzález Colás, Antonio María
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2017-06-06T09:30:55Z
dc.date.available2017-06-06T09:30:55Z
dc.date.issued2006
dc.identifier.citationChaparro, P., Magklis, G., González, J., González, A. Using MCD-DVS for dynamic thermal management performance improvement. A: Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems. "ITherm 2006: The Tenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems: Sheraton San Diego Hotel and Marina, San Diego, CA, May 30-June 2, 2006". San Diego, CA: Institute of Electrical and Electronics Engineers (IEEE), 2006, p. 140-146.
dc.identifier.isbn0-7803-9524-7
dc.identifier.urihttp://hdl.handle.net/2117/105152
dc.description.abstractWith chip temperature being a major hurdle in microprocessor design, techniques to recover the performance loss due to thermal emergency mechanisms are crucial in order to sustain performance growth. Many techniques for power reduction in the past and some on thermal management more recently have contributed to alleviate this problem. Probably the most important thermal control technique is dynamic voltage and frequency scaling (DVS) which allows for almost cubic reduction in power with worst-case performance penalty only linear. So far, DVS techniques for temperature control have been studied at the chip level. Finer grain DVS is feasible if a globally-asynchronous locally-synchronous (GALS) design style is employed. GALS, also known as multiple-clock domain (MCD), allows for an independent voltage and frequency control for each one of the clock domains that are part of the chip. There are several studies on DVS for GALS that aim to improve energy and power efficiency but not temperature. This paper proposes and analyses the usage of DVS at the domain level to control temperature in a clustered MCD microarchitecture with the goal of improving the performance of applications that do not meet the thermal constraints imposed by the designers.
dc.format.extent7 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshMicroprocessors -- Design and construction
dc.subject.otherMultiple clock domain architectures
dc.subject.otherGALS
dc.subject.otherDTM
dc.subject.otherDynamic frequency and voltage scaling
dc.titleUsing MCD-DVS for dynamic thermal management performance improvement
dc.typeConference report
dc.subject.lemacMicroprocessadors -- Disseny i construcció
dc.contributor.groupUniversitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
dc.identifier.doi10.1109/ITHERM.2006.1645334
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/1645334/
dc.rights.accessOpen Access
local.identifier.drac2358501
dc.description.versionPostprint (published version)
local.citation.authorChaparro, P.; Magklis, G.; González, J.; González, A.
local.citation.contributorIntersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems
local.citation.pubplaceSan Diego, CA
local.citation.publicationNameITherm 2006: The Tenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems: Sheraton San Diego Hotel and Marina, San Diego, CA, May 30-June 2, 2006
local.citation.startingPage140
local.citation.endingPage146


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