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dc.contributor.authorNeagu, Madalin
dc.contributor.authorManich Bou, Salvador
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2017-05-12T08:46:11Z
dc.date.available2019-04-02T00:30:55Z
dc.date.issued2017-04
dc.identifier.citationNeagu, M., Manich, S. Defending cache memory against cold-boot attacks boosted by power or EM radiation analysis. "Microelectronics journal", Abril 2017, vol. 62, p. 85-98.
dc.identifier.issn0026-2692
dc.identifier.urihttp://hdl.handle.net/2117/104349
dc.description.abstractSome algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data remanence. Thus, a sudden power shutdown may not delete data entirely, giving the opportunity to steal data. The biggest challenge for any technique aiming to secure the cache memory is performance penalty. Techniques based on data scrambling have demonstrated that security can be improved with a limited reduction in performance. However, they still cannot resist side-channel attacks like power or electromagnetic analysis. This paper presents a review of known attacks on memories and countermeasures proposed so far and an improved scrambling technique named random masking interleaved scrambling technique (RM-ISTe). This method is designed to protect the cache memory against cold-boot attacks, even if these are boosted by side-channel techniques like power or electromagnetic analysis.
dc.format.extent14 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subjectÀrees temàtiques de la UPC::Informàtica
dc.subject.lcshComputer storage devices
dc.subject.lcshPower electronics
dc.subject.otherData scrambling
dc.subject.otherCache memories
dc.subject.otherDifferential power analysis
dc.subject.otherSide-channel attack
dc.subject.otherError correction
dc.titleDefending cache memory against cold-boot attacks boosted by power or EM radiation analysis
dc.typeArticle
dc.subject.lemacOrdinadors--Dispositius de memòria
dc.subject.lemacElectrònica de potència
dc.contributor.groupUniversitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat
dc.identifier.doi10.1016/j.mejo.2017.02.010
dc.relation.publisherversionhttp://www.sciencedirect.com/science/article/pii/S0026269216304682
dc.rights.accessOpen Access
drac.iddocument19742368
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MICINN/1PE/TEC2013-41209-P
upcommons.citation.authorNeagu, M.; Manich, S.
upcommons.citation.publishedtrue
upcommons.citation.publicationNameMicroelectronics journal
upcommons.citation.volume62
upcommons.citation.startingPage85
upcommons.citation.endingPage98


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Except where otherwise noted, content on this work is licensed under a Creative Commons license: Attribution-NonCommercial-NoDerivs 3.0 Spain