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An analytical model for Loc/ID mappings caches
dc.contributor.author | Coras, Florin-Tudorel |
dc.contributor.author | Domingo Pascual, Jordi |
dc.contributor.author | Lewis, Darrel |
dc.contributor.author | Cabellos Aparicio, Alberto |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2017-03-23T08:17:30Z |
dc.date.available | 2017-03-23T08:17:30Z |
dc.date.issued | 2016-02 |
dc.identifier.citation | Coras, F., Domingo, J., Lewis, D., Cabellos-Aparicio, A. An analytical model for Loc/ID mappings caches. "IEEE-ACM transactions on networking", Febrer 2016, vol. 24, núm. 1, p. 506-516. |
dc.identifier.issn | 1063-6692 |
dc.identifier.uri | http://hdl.handle.net/2117/102815 |
dc.description.abstract | Concerns regarding the scalability of the interdomain routing have encouraged researchers to start elaborating a more robust Internet architecture. While consensus on the exact form of the solution is yet to be found, the need for a semantic decoupling of a node's location and identity is generally accepted as a promising way forward. However, this typically requires the use of caches that store temporal bindings between the two namespaces, to avoid hampering router packet forwarding speeds. In this article, we propose a methodology for an analytical analysis of cache performance that relies on the working-set theory. We first identify the conditions that network traffic must comply with for the theory to be applicable and then develop a model that predicts average cache miss rates relying on easily measurable traffic parameters. We validate the result by emulation, using real packet traces collected at the egress points of a campus and an academic network. To prove its versatility, we extend the model to consider cache polluting user traffic and observe that simple, low intensity attacks drastically reduce performance, whereby manufacturers should either overprovision router memory or implement more complex cache eviction policies. |
dc.format.extent | 11 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telemàtica i xarxes d'ordinadors::Internet |
dc.subject.lcsh | Routing (Computer network management) |
dc.subject.lcsh | Cache memory |
dc.subject.lcsh | Telecommunication -- Traffic -- Management |
dc.subject.other | Working-set model |
dc.subject.other | Cache modeling |
dc.subject.other | Location/identity separation |
dc.subject.other | Locator/ID Separation Protocol (LISP) |
dc.subject.other | Network traffic locality |
dc.title | An analytical model for Loc/ID mappings caches |
dc.type | Article |
dc.subject.lemac | Encaminadors (Xarxes d'ordinadors) |
dc.subject.lemac | Memòria cau |
dc.subject.lemac | Telecomunicació -- Tràfic -- Gestió |
dc.contributor.group | Universitat Politècnica de Catalunya. CBA - Sistemes de Comunicacions i Arquitectures de Banda Ampla |
dc.identifier.doi | 10.1109/TNET.2014.2373398 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/6975256/ |
dc.rights.access | Open Access |
local.identifier.drac | 19809804 |
dc.description.version | Postprint (author's final draft) |
dc.relation.projectid | info:eu-repo/grantAgreement/MICINN//TEC2011-29126-C03-02/ES/SOLUCIONES DE PROCESADO DIGITAL DE LA SEÑAL PARA SISTEMAS INALAMBRICOS SOSTENIBLES Y RECONFIGURABLES/ |
dc.relation.projectid | info:eu-repo/grantAgreement/AGAUR/IV PRI 2005-2008/2009SGR1140 |
dc.relation.projectid | info:eu-repo/grantAgreement/CISCO URP Grant |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO/FPU-AP2009-3790 |
local.citation.author | Coras, F.; Domingo, J.; Lewis, D.; Cabellos-Aparicio, Albert |
local.citation.publicationName | IEEE-ACM transactions on networking |
local.citation.volume | 24 |
local.citation.number | 1 |
local.citation.startingPage | 506 |
local.citation.endingPage | 516 |
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