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Exploiting path parallelism in logic programming
| dc.contributor.author | Tubella Murgadas, Jordi |
| dc.contributor.author | González Colás, Antonio María |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
| dc.date.accessioned | 2017-03-17T10:18:48Z |
| dc.date.available | 2017-03-17T10:18:48Z |
| dc.date.issued | 1995 |
| dc.identifier.citation | Tubella, J., Gonzalez, A. Exploiting path parallelism in logic programming. A: Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. "Euromicro Workshop on Parallel and Distributed Processing: proceedings". San Remo: Institute of Electrical and Electronics Engineers (IEEE), 1995, p. 164-173. |
| dc.identifier.isbn | 0-8186-7031-2 |
| dc.identifier.uri | http://hdl.handle.net/2117/102606 |
| dc.description.abstract | This paper presents a novel parallel implementation of Prolog. The system is based on Multipath, a novel execution model for Prolog that implements a partial breadth-first search of the SLD-tree. The paper focusses on the type of parallelism inherent to the execution model, which is called path parallelism. This is a particular case of data parallelism that can be efficiently exploited in a SPMD architecture. A SPMD architecture oriented to the Multipath execution model is presented. A simulator of such system has been developed and used to assess the performance of path parallelism. Performance figures show that path parallelism is effective for non-deterministic programs. |
| dc.format.extent | 10 p. |
| dc.language.iso | eng |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| dc.subject.lcsh | Logic programming |
| dc.subject.lcsh | Parallel processing (Electronic computers) |
| dc.subject.other | Memory management |
| dc.subject.other | Shape |
| dc.title | Exploiting path parallelism in logic programming |
| dc.type | Conference report |
| dc.subject.lemac | Programació lògica |
| dc.subject.lemac | Processament en paral·lel (Ordinadors) |
| dc.contributor.group | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
| dc.identifier.doi | 10.1109/EMPDP.1995.389143 |
| dc.description.peerreviewed | Peer Reviewed |
| dc.relation.publisherversion | http://ieeexplore.ieee.org/document/389143/ |
| dc.rights.access | Open Access |
| local.identifier.drac | 2375437 |
| dc.description.version | Postprint (published version) |
| local.citation.author | Tubella, J.; Gonzalez, A. |
| local.citation.contributor | Euromicro International Conference on Parallel, Distributed, and Network-Based Processing |
| local.citation.pubplace | San Remo |
| local.citation.publicationName | Euromicro Workshop on Parallel and Distributed Processing: proceedings |
| local.citation.startingPage | 164 |
| local.citation.endingPage | 173 |
