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dc.contributor.authorRoyo Vallés, María Dolores
dc.contributor.authorValero García, Miguel
dc.contributor.authorGonzález Colás, Antonio María
dc.contributor.authorMarí, Carme
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2017-03-17T09:59:20Z
dc.date.available2017-03-17T09:59:20Z
dc.date.issued1997
dc.identifier.citationRoyo, M.D., Valero-García, M, González, A., Marí, C. A methodology for user-oriented scalability analysis. A: IEEE International Conference on Application-Specific Systems, Architectures and Processors. "IEEE International Conference on Application-Specific Systems, Architectures and Processors: July 14-16, 1997, Zurich, Switzerland: proceedings". Zurich: Institute of Electrical and Electronics Engineers (IEEE), 1997, p. 304-315.
dc.identifier.isbn0-8186-7958-1
dc.identifier.urihttp://hdl.handle.net/2117/102605
dc.description.abstractScalability analysis provides information about the effectiveness of increasing the number of resources of a parallel system. Several methods have been proposed which use different approaches to provide this information. This paper presents a family of analysis methods oriented to the user. The methods in this family should assist the user in estimating the benefits when increasing the system size. The key issue in the proposal is the appropriate combination of a scaling model, which reflects the way the users utilize an increasing number of resources, and a figure of merit that the user wants to improve with the larger system. Another important element in the proposal is the approach to characterize the scalability, which enables quick visual analyses and comparisons. Finally, three concrete examples of methods belonging to the proposed family are introduced in this paper.
dc.format.extent12 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshParallel algorithms
dc.subject.lcshParallel processing (Electronic computers)
dc.subject.otherUser-oriented scalability analysis
dc.subject.otherScaling model
dc.subject.otherVisual analyses
dc.subject.otherParallel architectures
dc.titleA methodology for user-oriented scalability analysis
dc.typeConference report
dc.subject.lemacAlgorismes paral·lels
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.contributor.groupUniversitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
dc.identifier.doi10.1109/ASAP.1997.606836
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=606836
dc.rights.accessOpen Access
local.identifier.drac2396063
dc.description.versionPostprint (published version)
local.citation.authorRoyo, M.D.; Valero-García, M; González, A.; Marí, C.
local.citation.contributorIEEE International Conference on Application-Specific Systems, Architectures and Processors
local.citation.pubplaceZurich
local.citation.publicationNameIEEE International Conference on Application-Specific Systems, Architectures and Processors: July 14-16, 1997, Zurich, Switzerland: proceedings
local.citation.startingPage304
local.citation.endingPage315


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