Dynamic cluster resizing
Document typeConference report
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
Processor resources required for an effective execution of an application vary across different sections. We propose to take advantage of clustering to turn-off resources that do not contribute to improve performance. First, we present a simple hardware scheme to dynamically compute the energy consumed by each processor block and the energy-delay2 product for a given interval of time. This scheme is used to compute the effectiveness of the current configuration in terms of energy-delay2 and evaluate the benefits of increasing/decreasing the number of active issue queues. Performance evaluation shows an average energy-delay2 product improvement of 18%, and up to 50% for some applications, in a quad-cluster architecture.
CitationGonzález, J., Gonzalez, A. Dynamic cluster resizing. A: IEEE International Conference on Computer Design. "Proceedings 21st International Conference on Computer Design". San Jose, California: Institute of Electrical and Electronics Engineers (IEEE), 2003, p. 375-377.