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Selective branch prediction reversal by correlating with data values and control flow

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10.1109/ICCD.2001.955033
 
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hdl:2117/102017

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Aragón, Juan Luis
González, José
García Carrasco, José M.
González Colás, Antonio MaríaMés informacióMés informacióMés informació
Document typeConference report
Defense date2001
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
Branch prediction is one of the main hurdles in the roadmap towards deeper pipelines and higher clock frequencies. This work presents a new approach to enhancing current branch predictors: Selective Branch Prediction Reversal. The rationale behind this proposal is the fact that many branch mispredictions can be avoided if branch prediction is selectively reversed. We present a Branch Prediction Reversal Unit (BPRU) that selectively reverses branch predictions by correlating with the predicted values of the branch inputs, in addition to recent control flow. As a case study, we have included the BPRU in an already proposed branch predictor, the Branch Predictor through Value Prediction (BPVP). The effect is a reduction by half in its original misprediction rate. We have also measured the improvement when the BPRU engine is used in a hybrid scheme composed of a BPVP and a gshare predictor. Results using immediate updates show average reductions in misprediction rate ranging from 7% to 14%. Performance evaluation of the proposed BPRU in a 20-stage superscalar processor shows an IPC improvement of up to 9%.
CitationAragón, J., González, J., García, J., González, A. Selective branch prediction reversal by correlating with data values and control flow. A: IEEE International Conference on Computer Design. "2001 International Conference on Computer Design, ICCD 2001: 23-26 September 2001 Austin, Texas, USA: proceedings". Austin, TX: Institute of Electrical and Electronics Engineers (IEEE), 2001, p. 228-233. 
URIhttp://hdl.handle.net/2117/102017
DOI10.1109/ICCD.2001.955033
ISBN0-7695-1200-3
Publisher versionhttp://ieeexplore.ieee.org/document/955033/
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  • Departament d'Arquitectura de Computadors - Ponències/Comunicacions de congressos [1.847]
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