An output-capacitorless FVF-based low-dropout regulator for power management applications

This paper presents an output-capacitorless low dropout (LDO) regulator based on improved flipped voltage follower power stage for use in power management circuits. A new error amplifier (EA) structure, named as gain-bandwidth enhanced EA, is embedded in the LDO regulator. The LDO regulator is designed for the input and output voltages of 1.2 V and 1 V, respectively. Fast transients, low overshoot and undershoot, and low quiescent current of 6 µA are achieved for the proposed circuit. The LDO regulator is designed for maximum load current of 50 mA, achieving the current and power efficiencies of 99.99% and 83.3%, respectively. Additionally, up to 131 pF capacitance is used in the proposed LDO structure. The proposed circuit is designed and verified in HSPICE in TSMC 0.18 µm mixed signal CMOS process.

CitationShirmohammadli, V., Saberkari, A., Martinez, H., Alarcon, E. An output-capacitorless FVF-based low-dropout regulator for power management applications. A: IEEE International Conference on Industrial Informatics. "2016 IEEE 14th International Conference on Industrial Informatics (INDIN): Palais des Congrès du Futuroscope, Futuroscope-Poitiers, France 19-21 July, 2016: proceedings". Futuroscope - Poitiers: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 258-263.

URIhttp://hdl.handle.net/2117/101898

DOI10.1109/INDIN.2016.7819169

ISBN978-1-5090-2870-2

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An output-capacitorless FVF-based low-dropout regulator for power management applications

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