dc.contributor.author | Cai, Qiong |
dc.contributor.author | Codina Viñas, Josep M. |
dc.contributor.author | González González, José |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2017-02-20T08:52:30Z |
dc.date.available | 2017-02-20T08:52:30Z |
dc.date.issued | 2008 |
dc.identifier.citation | Cai, Q., Codina, J.M., González, J., González, A. A software-hardware hybrid steering mechanism for clustered microarchitectures. A: IEEE International Symposium on Parallel and Distributed Processing. "IEEE International Symposium on Parallel and Distributed Processing, 2008: IPDPS 2008; 14-18 April 2008, Miami, Florida, USA". Miami, Florida: Institute of Electrical and Electronics Engineers (IEEE), 2008, p. 1-12. |
dc.identifier.isbn | 978-1-4244-1694-3 |
dc.identifier.uri | http://hdl.handle.net/2117/101198 |
dc.description.abstract | Clustered microarchitectures provide a promising paradigm to solve or alleviate the problems of increasing microprocessor complexity and wire delays. High- performance out-of-order processors rely on hardware-only steering mechanisms to achieve balanced workload distribution among clusters. However, the additional steering logic results in a significant increase on complexity, which actually decreases the benefits of the clustered design. In this paper, we address this complexity issue and present a novel software-hardware hybrid steering mechanism for out-of-order processors. The proposed software- hardware cooperative scheme makes use of the concept of virtual clusters. Instructions are distributed to virtual clusters at compile time using static properties of the program such as data dependences. Then, at runtime, virtual clusters are mapped into physical clusters by considering workload information. Experiments using SPEC CPU2000 benchmarks show that our hybrid approach can achieve almost the same performance as a state-of-the-art hardware-only steering scheme, while requiring low hardware complexity. In addition, the proposed mechanism outperforms state-of-the-art software-only steering mechanisms by 5% and 10% on average for 2-cluster and 4-cluster machines, respectively. |
dc.format.extent | 12 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Microprocessors |
dc.subject.lcsh | Compilers (Computer programs) |
dc.subject.other | Circuit complexity |
dc.subject.other | Computer architecture |
dc.subject.other | Hardware-software codesign |
dc.subject.other | Logic design |
dc.subject.other | Microprocessor chips |
dc.subject.other | Program compilers |
dc.subject.other | Program diagnostics |
dc.title | A software-hardware hybrid steering mechanism for clustered microarchitectures |
dc.type | Conference report |
dc.subject.lemac | Microprocessadors |
dc.subject.lemac | Compiladors (Programes d'ordinador) |
dc.contributor.group | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.identifier.doi | 10.1109/IPDPS.2008.4536229 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4536229 |
dc.rights.access | Open Access |
local.identifier.drac | 2415651 |
dc.description.version | Postprint (published version) |
local.citation.author | Cai, Q.; Codina, J.M.; González, J.; González, A. |
local.citation.contributor | IEEE International Symposium on Parallel and Distributed Processing |
local.citation.pubplace | Miami, Florida |
local.citation.publicationName | IEEE International Symposium on Parallel and Distributed Processing, 2008: IPDPS 2008; 14-18 April 2008, Miami, Florida, USA |
local.citation.startingPage | 1 |
local.citation.endingPage | 12 |