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Anaphase: a fine-grain thread decomposition scheme for speculative multithreading

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10.1109/PACT.2009.27
 
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hdl:2117/101169

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Madriles Gimeno, Carles
López Muñoz, Pedro
Codina Viñas, Josep M.
Gibert Codina, Enric
Latorre Salinas, Fernando
Martínez Vicente, Alejandro
Martinez, Raul
González Colás, Antonio MaríaMés informacióMés informacióMés informació
Document typeConference report
Defense date2009
PublisherIEEE Computer Society
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level parallelism (TLP) but do not provide benefits when executing serial code (applications with low TLP, serial parts of a parallel application and legacy code). In this paper we propose Anaphase, a novel approach for speculative multithreading to improve single-thread performance in a multi-core design. The proposed technique is based on a graph partitioning technique which performs a decomposition of applications into speculative threads at instruction granularity. Moreover, the proposed technique leverages communications and pre-computation slices to deal with inter-thread dependences. Results presented in this paper show that this approach improves single-thread performance by 32% on average and up to 2.15x for some selected applications of the Spec2006 suite. In addition, the proposed technique outperforms by 21% on average schemes in which thread decomposition is performed at a coarser granularity.
CitationMadriles, C., López, P., Codina, J.M., Gibert, E., Latorre, F., Martínez, A., Martínez, R., González, A. Anaphase: a fine-grain thread decomposition scheme for speculative multithreading. A: International Conference on Parallel Architectures and Compilation Techniques. "18th International Conference on Parallel Architectures and Compilation Techniques. PACT 2009: proceedings". Raleigh, North Carolina: IEEE Computer Society, 2009, p. 15-25. 
URIhttp://hdl.handle.net/2117/101169
DOI10.1109/PACT.2009.27
ISBN978-0-7695-3771-9
Publisher versionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5260571
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