Charge trapping control in MOS capacitors

Abstract

This paper presents an active control of C-V characteristic for MOS capacitors based on Sliding Mode control and sigma-delta-modulation. The capacitance of the device at a certain voltage is measured periodically and adequate voltage excitations are generated by a feedback loop to place the C-V curve at the desired target position. Experimental results are presented for a n-type c-Si MOS capacitor made with silicon dioxide. It is shown that with this approach it is possible to shift horizontally the C-V curve to the desired operation point. A physical analysis is also presented to explain how the C-V horizontal displacements can be linked to charge trapping in the bulk of the oxide and/or in the silicon-oxide interface. Finally, design criteria are provided for tuning the main parameters of the sliding mode controller.