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Charge trapping control in MOS capacitors

Cita com:
hdl:2117/100877
Document typeArticle
Defense date2016-12-26
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
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Abstract
This paper presents an active control of C-V characteristic for MOS capacitors based on Sliding Mode control and sigma-delta-modulation. The capacitance of the device at a certain voltage is measured periodically and adequate voltage excitations are generated by a feedback loop to place the C-V curve at the desired target position. Experimental results are presented for a n-type c-Si MOS capacitor made with silicon dioxide. It is shown that with this approach it is possible to shift horizontally the C-V curve to the desired operation point. A physical analysis is also presented to explain how the C-V horizontal displacements can be linked to charge trapping in the bulk of the oxide and/or in the silicon-oxide interface. Finally, design criteria are provided for tuning the main parameters of the sliding mode controller.
CitationDominguez, M., Bheesayagari, C., Gorreta, S., Lopez, G., Martin, I., Blokhina, E., Pons, J. Charge trapping control in MOS capacitors. "IEEE transactions on industrial electronics", 26 Desembre 2016, vol. PP, núm. 99, p. 1-7.
ISSN0278-0046
Publisher versionhttp://ieeexplore.ieee.org/document/7797504/
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