Enhancing the performance of output-capacitorless LDO regulators by pass-transistor segmentation

Abstract

This paper deals with a circuit proposal along with theoretical analysis to provide a solution for enhancing the stability and transient performance of external capacitorless low-dropout regulators (CL-LDOs) by segmenting the pass transistor to smaller sizes. The stability and transient analysis is carried out on the CL-LDO with two different size-segmented pass transistors in comparison with the conventional CL-LDO with single large size pass device. The analysis shows that the pass transistor segmentation leads to better stability, i.e., greater phase margin especially at no-load and light-load conditions, wider bandwidth, and improved transient behavior, i.e., lower settling time and output voltage deviations due to the load transients. The aforementioned topologies are modeled and validated in HSPICE using a 0.35 µm CMOS process, and the results are in conformity with the analytical statements.