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dc.contributor.authorKosmidis, Leonidas
dc.contributor.authorQuiñones, Eduardo
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorVardanega, Tullio
dc.contributor.authorHernández, Carles
dc.contributor.authorGianarro, Andrea
dc.contributor.authorBroster, Ian
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2017-02-02T09:14:33Z
dc.date.available2018-11-30T01:30:50Z
dc.date.issued2016-11-01
dc.identifier.citationKosmidis, L., Quiñones, E., Abella, J., Vardanega, T., Hernández, C., Gianarro, A., Broster, I., Cazorla, F. Fitting processor architectures for measurement-based probabilistic timing analysis. "Microprocessors and microsystems", 1 Novembre 2016, vol. 47, núm. Part B, p. 287-302.
dc.identifier.issn0141-9331
dc.identifier.urihttp://hdl.handle.net/2117/100471
dc.description.abstractThe pressing market demand for competitive performance/cost ratios compels Critical Real-Time Embedded Systems industry to employ feature-rich hardware. The ensuing rise in hardware complexity however makes worst-case execution time (WCET) analysis of software programs - which is often required, especially for programs at the highest levels of integrity - an even harder challenge. State-of-the-art WCET analysis techniques are hampered by the soaring cost and complexity of obtaining accurate knowledge of the internal operation of advanced processors and the difficulty of relating data obtained from measurement observations with reliable worst-case behaviour. This frustrating conundrum calls for novel solutions, with low intrusiveness on development practice. Measurement-Based Probabilistic Timing Analysis (MBPTA) techniques offer the opportunity to simultaneously reduce the cost of acquiring the knowledge needed for computing reliable WCET bounds and gain increased confidence in the representativeness of measurement observations. This paper describes the changes required in the design of several high-performance features - massively used in modern processors - to meet MBPTA requirements.
dc.description.sponsorshipThis work has received funding from the European Community's Seventh 1025 Framework Programme [FP7/2007-2013] under grant agreement 611085 (PROXIMA, www.proxima-project.eu). Support was also provided by the Ministry of Science and Technology of Spain under contract TIN2015-65316-P and the HiPEAC Network of Excellence. Leonidas Kosmidis is funded by the Spanish Ministry of Education under FPU grant AP2010-4208. Jaume Abella has been 1030 partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. The authors wish to acknowledge Michael Houston, Liliana Cucu-Grosjean and Luca Santinelli for contributing to the genesis of this work.
dc.format.extent16 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 4.0 International License
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshEmbedded computer systems
dc.subject.lcshCache memory
dc.subject.lcshReal-time data processing
dc.subject.otherWorst-case execution time
dc.subject.otherProcessor architecture
dc.subject.otherCache memories
dc.subject.otherProbabilistic analysis
dc.subject.otherTime randomization
dc.titleFitting processor architectures for measurement-based probabilistic timing analysis
dc.typeArticle
dc.subject.lemacOrdinadors immersos, Sistemes d'
dc.subject.lemacMemòria ràpida de treball (Informàtica)
dc.subject.lemacTemps real (Informàtica)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1016/j.micpro.2016.07.014
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://www.sciencedirect.com/science/article/pii/S0141933116300977
dc.rights.accessOpen Access
local.identifier.drac19620035
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/TIN2015-65316-P
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/RYC-2013-14717
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/611085/EU/Probabilistic real-time control of mixed-criticality multicore and manycore systems/PROXIMA
local.citation.authorKosmidis, L.; Quiñones, E.; Abella, J.; Vardanega, T.; Hernández, C.; Gianarro, A.; Broster, I.; Cazorla, F.
local.citation.publicationNameMicroprocessors and microsystems
local.citation.volume47
local.citation.numberPart B
local.citation.startingPage287
local.citation.endingPage302


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