Another trip to the wall: how much will stacked DRAM benefit HPC?

First defined two decades ago, the memory wall remains a fundamental limitation to system performance. Recent innovations in 3D-stacking technology enable DRAM devices with much higher bandwidths than traditional DIMMs. The first such products will soon hit the market, and some of the publicity claims that they will break through the memory wall. Here we summarize our analysis and expectations of how such 3D-stacked DRAMs will affect the memory wall for a set of representative HPC applications. We conclude that although 3D-stacked DRAM is a major technological innovation, it cannot eliminate the memory wall.

CitationRadulovic, M., Zivanovic, D., Ruiz, D., De Supinski, B., McKee, S., Radojkovic, P., Ayguade, E. Another trip to the wall: how much will stacked DRAM benefit HPC?. A: International Symposium on Memory Systems. "MEMSYS 2015: proceedings of the First International Symposium on Memory Systems: Washington DC, October 5-8, 2015". Association for Computing Machinery (ACM), 2015, p. 31-36.

URIhttp://hdl.handle.net/2117/100169

DOI10.1145/2818950.2818955

ISBN978-1-4503-3604-8

Publisher versionhttp://dl.acm.org/citation.cfm?doid=2818950.2818955

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