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dc.contributor.authorSlijepcevic, Mladen
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.date.accessioned2015-06-03T09:21:44Z
dc.date.available2015-06-03T09:21:44Z
dc.date.issued2015-05-05
dc.identifier.citationSlijepcevic, Mladen; Abella, Jaume; Cazorla, Francisco J. Probabilistically time-analyzable complex processors in hard real- time systems. A: "BSC Doctoral Symposium (2nd: 2015: Barcelona)". 2nd ed. Barcelona: Barcelona Supercomputing Center, 2015, p. 88-89.
dc.identifier.urihttp://hdl.handle.net/2099/16558
dc.description.abstractCritical Real-Time Embedded Systems (CRTES) feature performance-demanding functionality. High-performance hardware and complex software can provide such functionality, but the use of aggressive technology challenges time-predictability. Our work focuses on the investigation and development of (1) hardware mechanisms to control inter-task interferences in shared timerandomized caches and (2) manycore network-on-chip designs meeting the requirements of Probabilistic Timing Analysis (PTA).
dc.format.extent2 p.
dc.language.isoeng
dc.publisherBarcelona Supercomputing Center
dc.relation.ispartofBSC Doctoral Symposium (2nd: 2015: Barcelona)
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshHigh performance computing
dc.subject.lcshSupercomputers
dc.titleProbabilistically time-analyzable complex processors in hard real- time systems
dc.typeConference report
dc.subject.lemacCàlcul intensiu (Informàtica)
dc.subject.lemacSupercomputadors
dc.rights.accessOpen Access
local.citation.authorSlijepcevic, Mladen; Abella, Jaume; Cazorla, Francisco J.
local.citation.pubplaceBarcelona
local.citation.publicationNameBSC Doctoral Symposium (2nd: 2015: Barcelona)
local.citation.startingPage88
local.citation.endingPage89
local.citation.edition2nd


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