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dc.contributorCristal Kestelman, Adrián
dc.contributor.authorArcas Abella, Oriol
dc.date.accessioned2009-09-30T07:08:54Z
dc.date.available2009-09-30T07:08:54Z
dc.date.issued2009-09-23
dc.identifier.urihttp://hdl.handle.net/2099.1/7460
dc.description.abstractIn recent years, to accomplish with the Moore's law hardware and software designers are tending progressively to focus their efforts on exploiting instruction-level parallelism. Software simulation has been essential for studying computer architecture because of its flexibility and low cost. However, users of software simulators must choose between high performance and high fidelity emulation. This project presents an FPGA-based multiprocessor architecture to speed up multiprocessor architecture research and ease parallel software simulation.
dc.language.isoeng
dc.publisherUniversitat Politècnica de Catalunya
dc.subjectÀrees temàtiques de la UPC::Informàtica::Hardware
dc.subject.lcshMicroprocessors
dc.subject.lcshIntegrated circuits
dc.subject.otherMultiprocessador
dc.subject.otherFPGA
dc.subject.otherSimulació
dc.subject.otherEmulació
dc.subject.otherBEE3
dc.subject.otherBeehive
dc.subject.otherHoneycomb
dc.subject.otherPlasma
dc.subject.otherMultiprocessor
dc.titleBeehive: an FPGA-based multiprocessor architecture
dc.typeMaster thesis
dc.subject.lemacMicroprocessadors
dc.subject.lemacCircuits integrats
dc.identifier.slug59395
dc.rights.accessOpen Access
dc.date.updated2009-09-29T11:46:39Z
dc.audience.educationlevelMàster
dc.audience.mediatorFacultat d'Informàtica de Barcelona


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