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Automatic Detection and Localization of Logic Gates using Image Recognition
dc.contributor | Tarrés Ruiz, Francisco |
dc.contributor.author | Martin Cirera, Albert |
dc.date.accessioned | 2013-12-03T18:27:14Z |
dc.date.available | 2013-12-03T18:27:14Z |
dc.date.issued | 2013-11-25 |
dc.identifier.uri | http://hdl.handle.net/2099.1/19975 |
dc.description.abstract | In order to extract the images of a microchip is necessary attack the microchip with mechanical or chemical lapping and taking pictures from the inside. The result is the extraction of four layers with their respective images, including the cell layer where the logic gates are defined. This image of the cell layer is very large and could store tens of thousands of logic gates inside. The main objective of this project is to design and implement a software to recognize logic gates and specify its precise location in the cell layer of a microchip. |
dc.language.iso | eng |
dc.publisher | Universitat Politècnica de Catalunya |
dc.rights | Attribution-NonCommercial-ShareAlike 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject.lcsh | Application specific integrated circuits |
dc.subject.lcsh | Electronic digital computers --Circuits |
dc.subject.other | Logic Gate |
dc.subject.other | Integrated Circuit |
dc.subject.other | Reverse Engineering |
dc.subject.other | Image Processing |
dc.subject.other | Matlab |
dc.title | Automatic Detection and Localization of Logic Gates using Image Recognition |
dc.type | Master thesis |
dc.subject.lemac | Circuits integrats |
dc.rights.access | Open Access |
dc.date.updated | 2013-11-27T06:35:19Z |
dc.audience.educationlevel | Estudis de primer/segon cicle |
dc.audience.mediator | Escola d'Enginyeria de Telecomunicació i Aeroespacial de Castelldefels |