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dc.contributorGilabert Pinal, Pere Lluís
dc.contributorMontoro López, Gabriel
dc.contributor.authorFernandes Marques, Nuno Filipe
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions
dc.date.accessioned2013-11-05T10:22:53Z
dc.date.available2013-11-05T10:22:53Z
dc.date.issued2013-07-24
dc.identifier.urihttp://hdl.handle.net/2099.1/19565
dc.description.abstractThe PA is one of the most important subsystems of the RF transmitter and it is responsible of the main part of the overall transmitter's power consumption. In order to increase the efficiency of the PA, this project proposes designing in a FPGA adaptive filtering techniques to update the coefficient of digital predistortion linearizers. More precisely, the least squares (LS) algorithm is design to be implemented in soft-core processor as the Xilinx MicroBlaze, while the least mean squares (LMS) algorithm is design for real-time operation in the FPGA. The experimental results obtained show a promising performance of the multi look-up table (M-LUT) based digital predistorter (DPD). Good linearity levels are reported. However, an exhaustive study on the required arithmetic resolution has yet to be carried out in order to mitigate the quantization noise and lead to a higher performance of the DPD using these kind of quadratic minimization algorithms.
dc.language.isoeng
dc.publisherUniversitat Politècnica de Catalunya
dc.rightsAttribution-NonCommercial-ShareAlike 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria de la telecomunicació
dc.subject.lcshLeast Squares
dc.subject.otherDigital Predistortion
dc.subject.otherLeast Squares
dc.subject.otherLeast Mean Squares
dc.subject.otherFPGA
dc.titleFPGA implementation of quadratic minimization algorithms for digital predistortion linearization
dc.typeBachelor thesis
dc.subject.lemacCorrelació (Estadística)
dc.rights.accessRestricted access - author's decision
dc.date.lift10000-01-01
dc.date.updated2013-07-30T11:34:52Z
dc.audience.educationlevelGrau
dc.audience.mediatorEscola d'Enginyeria de Telecomunicació i Aeroespacial de Castelldefels
dc.audience.degreeGRAU EN ENGINYERIA DE SISTEMES DE TELECOMUNICACIÓ (Pla 2009)


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