Communications within a chip or even groups of chips are typically carried out using physical connections to transmit signals between them. Nowadays, the use of wireless communications using antennas inside chip packages is being explored to eliminate the physical barrier and be able to build more efficient architectures. The main objective of this thesis is to model and simulate different types of commercial chip packages (Flip-chip, Interposer and Wirebond) and characterize the behaviour of the wireless channel within a chip. This is a crucial first step to understand the potential performance and efficiency of wireless communications in this scenario. To do this, multiple simulations have been carried out in an electromagnetic field simulation software (CST Studio Suite) using different materials, sizes and frequencies. As a result of the simulations, we have managed to characterize the communications channel for each type of chip proposed in terms of path loss and delay spread, allowing us to determine which conditions are the most suitable for in-package transmission between its antennas.