Modern CPU designs are generally composed of several CPU cores. These type of CPUs are also known as multiprocessors. Multiprocessors started becoming widely available during the early 2000s with the appearance of the first dual-core designs. Core counts have continuously increased until this day when CPUs with hundreds of cores are not uncommon. Multiprocessors pose new challenges that did not exist with single-core CPUs, one of them being memory consistency. Memory consistency is a fascinating topic with a very range of influence that spans from microarchitectural CPU design to compilers. In the present work memory consistency will be studied, with special focus on RISC-V's memory consistency model. A microarchitectural optimization for RISC-V CPUs will be designed, implemented and evaluated.