Designing asynchronous circuits from behavioural specifications with internal conflicts

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dc.contributor.authorCortadella, Jordi
dc.contributor.authorLavagno, Luciano
dc.contributor.authorVanbekbergen, Peter
dc.contributor.authorYakovlev, Alex
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.date.accessioned2019-02-07T07:05:44Z
dc.date.available2019-02-07T07:05:44Z
dc.date.issued1994
dc.description.abstractThe paper presents a systematic method for synthesizing asynchronous circuits from event-based specifications with conflicts on output signals. It describes a set of semantic-preserving transformations performed at the Petri net level, which introduce auxiliary signal transitions implemented by internally analogue components, Mutual Exclusion (ME) elements. The logic for primary outputs can therefore be realized free from hazards and external meta-stability. The technique draws upon the use of standard logic components and two-input MEs, available in a typical design library.
dc.description.peerreviewedPeer Reviewed
dc.description.versionPostprint (published version)
dc.format.extent10 p.
dc.identifier.citationCortadella, J. [et al.]. Designing asynchronous circuits from behavioural specifications with internal conflicts. A: International Symposim on Advanced Research in Asynchronous Circuits and Systems. "Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems: November 3-5, 1994, Salt Lake City, Utah". Institute of Electrical and Electronics Engineers (IEEE), 1994, p. 106-115.
dc.identifier.doi10.1109/ASYNC.1994.656296
dc.identifier.isbn0-8186-6210-7
dc.identifier.urihttps://hdl.handle.net/2117/128605
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/656296
dc.rights.accessOpen Access
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshAsynchronous circuits
dc.subject.lcshLogic design
dc.subject.lcshLogic circuits
dc.subject.lemacCircuits asíncrons
dc.subject.lemacEstructura lògica
dc.subject.lemacCircuits lògics
dc.subject.otherBehavioural specifications
dc.subject.otherInternal conflicts
dc.subject.otherSemantic-preserving transformations
dc.subject.otherPetri net
dc.subject.otherMutual Exclusion
dc.subject.otherHazards
dc.titleDesigning asynchronous circuits from behavioural specifications with internal conflicts
dc.typeConference report
dspace.entity.typePublication
local.citation.authorCortadella, J.; Lavagno, L.; Vanbekbergen, P.; Yakovlev, A.
local.citation.contributorInternational Symposim on Advanced Research in Asynchronous Circuits and Systems
local.citation.endingPage115
local.citation.publicationNameProceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems: November 3-5, 1994, Salt Lake City, Utah
local.citation.startingPage106
local.identifier.drac2414391

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