This thesis covers the design of a Complementary Metal-Oxide-Semiconductor (CMOS) folded Cascode Operational Transconductance Amplifier (OTA) in UMC 180nm technology. The broad use of operational transconductance amplifiers in the industry requires them to be highly efficient to improve the operation of the circuits they are included in. A technique called current recycling is known to improve the power efficiency of the amplifier with a minimal complication of the circuit. This thesis covers the standard implementation of the folded cascode amplifier and the current recycling folded cascode and simulations to compare them in terms of performance, checking both pros and cons of both implementations. Layout and Post Layout simulations of the current recycling folded cascode amplifier will also be carried out. Furthermore, a biasing circuit has also been included in both designs, which will provide the bias voltage without the need of extra sources other than VDD. The implemented design of the biasing circuit is a design that it is insensitive to power source fluctuations based on a stable transconductance matched to the conductance of a resistor.