S1 - X-Masking for In-System Deterministic Test
| dc.contributor.author | Mrugalski, Grzegorz |
| dc.contributor.author | Rajski, Janusz |
| dc.contributor.author | Tyszer, Jerzy |
| dc.contributor.author | Włodarczak, Bartosz |
| dc.date.accessioned | 2022-07-08T08:22:00Z |
| dc.date.issued | 2022-05 |
| dc.description.abstract | In-system deterministic tests are used in safetysensitive designs to assure high test coverage, short test time, and low data volume, typically through an input-streaming-only approach that allows a quick test delivery. The output side of the same scheme is, however, inherently vulnerable to unknown (X) states whose sources vary from uninitialized memory elements to the last-minute timing violations. Typically, X values degrade test results and thus test response compaction requires some form of protection. This paper presents two X-masking schemes that complement the primary (or level-A) blocking of unknown values by filtering out those X states that escape the first stage of masking and shall not reach a test response compactor or test result sticky-bits deployed by the on-chip compare framework. Experimental results obtained for eleven industrial designs show feasibility and efficiency of the proposed schemes altogether with actual impact of X-masking on various test-related statistics. |
| dc.format.extent | 6 p. |
| dc.identifier.citation | Mrugalski, G. [et al.]. S1 - X-Masking for In-System Deterministic Test. A: 27th IEEE European Test Symposium (ETS). 2022, |
| dc.identifier.uri | https://hdl.handle.net/2117/372136 |
| dc.language.iso | eng |
| dc.relation.publisherversion | https://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding |
| dc.rights.access | Restricted access - publisher's policy |
| dc.rights.licensename | Attribution-NonCommercial-NoDerivatives 4.0 International |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ |
| dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica |
| dc.subject.lcsh | Microelectronics |
| dc.subject.lcsh | Integrated circuits |
| dc.subject.lcsh | Spintronics |
| dc.subject.lemac | Microelectrònica |
| dc.subject.lemac | Circuits integrats |
| dc.subject.lemac | Espintrònica |
| dc.subject.other | Embedded-test |
| dc.subject.other | In-system test |
| dc.subject.other | Scan-based testing |
| dc.subject.other | Test compression |
| dc.subject.other | Unknown states |
| dc.subject.other | X-masking |
| dc.title | S1 - X-Masking for In-System Deterministic Test |
| dc.type | Conference report |
| dspace.entity.type | Publication |
| local.citation.contributor | 27th IEEE European Test Symposium (ETS) |
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