A general model for performance optimization of sequential systems

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dc.contributor.authorBufistov, Dmitry
dc.contributor.authorCortadella, Jordi
dc.contributor.authorKishinevsky, Michael
dc.contributor.authorSapatnekar, Sachin S.
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorísmia, Bioinformàtica, Complexitat i Mètodes Formals
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.date.accessioned2019-05-09T11:45:43Z
dc.date.available2019-05-09T11:45:43Z
dc.date.issued2007
dc.description.abstractRetiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, different models that provide exact solutions have already been proposed. An exact model for recycling was yet unknown. This paper presents a general formulation that covers the combination of the three schemes for performance optimization. It provides an exact model based on integer linear programming that resorts to the structural theory of marked graphs. A set of experiments has been designed to show the benefits in performance obtained by combining retiming and recycling. The results also show the applicability of the method in large circuits.
dc.description.peerreviewedPeer Reviewed
dc.description.versionPostprint (published version)
dc.format.extent8 p.
dc.identifier.citationBufistov, D. [et al.]. A general model for performance optimization of sequential systems. A: IEEE/ACM International Conference on Computer-Aided Design. "2007 International Conference on Computer-Aided Design, ICCAD 2007: San Jose, CA, USA, November 5-8, 2007". Institute of Electrical and Electronics Engineers (IEEE), 2007, p. 362-369.
dc.identifier.doi10.1109/ICCAD.2007.4397291
dc.identifier.isbn978-1-4244-1381-2
dc.identifier.urihttps://hdl.handle.net/2117/132804
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/4397291
dc.rights.accessOpen Access
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshGraph theory
dc.subject.lcshInteger programming
dc.subject.lcshLinear programming
dc.subject.lcshLogic circuits
dc.subject.lemacGrafs, Teoria de
dc.subject.lemacProgramació en nombres enters
dc.subject.lemacProgramació lineal
dc.subject.lemacCircuits lògics
dc.subject.otherCircuit optimisation
dc.subject.otherSequential circuits
dc.titleA general model for performance optimization of sequential systems
dc.typeConference report
dspace.entity.typePublication
local.citation.authorBufistov, D.; Cortadella, J.; Kishinevsky, M.; Sapatnekar, S.
local.citation.contributorIEEE/ACM International Conference on Computer-Aided Design
local.citation.endingPage369
local.citation.publicationName2007 International Conference on Computer-Aided Design, ICCAD 2007: San Jose, CA, USA, November 5-8, 2007
local.citation.startingPage362
local.identifier.drac24473542

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