Now showing items 1-5 of 5

  • Architecture and micro-architecture support for virtual machines and datacenters 

    Vilanova, Lluís (Barcelona Supercomputing Center, 2019)
    Other
    Open Access
  • CODOMs: Protecting software with code-centric memory domains 

    Vilanova, Lluís; Ben-Yehuda, Muli; Navarro, Nacho; Etsion, Yoav; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Restricted access - publisher's policy
    Today's complex software systems are neither secure nor reliable. The rudimentary software protection primitives provided by current hardware forces systems to run many distrusting software components (e.g., procedures, ...
  • Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures 

    Álvarez Martí, Lluc; Vilanova, Lluís; Moreto Planas, Miquel; Casas, Marc; González Tallada, Marc; Martorell Bofill, Xavier; Navarro, Nacho; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2015)
    Conference report
    Open Access
    The increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a ...
  • Comparison based sorting for systems with multiple GPUs 

    Tanasic, Ivan; Vilanova, Lluís; Jorda, Marc; Cabezas, Javier; Gelado Fernandez, Isaac; Navarro, Nacho; Hwu, Wen-mei W. (Association for Computing Machinery (ACM), 2013)
    Conference report
    Restricted access - publisher's policy
    As a basic building block of many applications, sorting algorithms that efficiently run on modern machines are key for the performance of these applications. With the recent shift to using GPUs for general purpose compuing, ...
  • Hardware-software coherence protocol for the coexistence of caches and local memories 

    Álvarez Martí, Lluc; Vilanova, Lluís; González Tallada, Marc; Martorell Bofill, Xavier; Navarro, Nacho; Ayguadé Parra, Eduard (2015-01-01)
    Article
    Open Access
    Cache coherence protocols limit the scalability of multicore and manycore architectures and are responsible for an important amount of the power consumed in the chip. A good way to alleviate these problems is to introduce ...