Listar por autor "Vardanega, Tullio"
Mostrando ítems 1-15 de 15
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Automatic distributed deep learning using resource-constrained edge devices
Gutiérrez Torre, Alberto; Bahadori, Kiyana; Baig, Shuja-ur-Rehman; Iqbal, Waheed; Vardanega, Tullio; Berral García, Josep Lluís; Carrera Pérez, David (Institute of Electrical and Electronics Engineers (IEEE), 2022-08-15)
Artículo
Acceso abiertoProcessing data generated at high volume and speed from the Internet of Things, smart cities, domotic, intelligent surveillance, and e-healthcare systems require efficient data processing and analytics services at the Edge ... -
Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration
Fernandez, Gabriel; Jalle, Javier; Abella Ferrer, Jaume; Quiñones, Eduardo; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2016-10-11)
Artículo
Acceso abiertoNumerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which ... -
Contention in multicore hardware shared resources: Understanding of the state of the art
Fernández, Gabriel; Abella Ferrer, Jaume; Quiñones, Eduardo; Rochange, Christine; Vardanega, Tullio; Cazorla Almeida, Francisco Javier (Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2014)
Texto en actas de congreso
Acceso abiertoThe real-time systems community has over the years devoted considerable attention to the impact on execution timing that arises from contention on access to hardware shared resources. The relevance of this problem has been ... -
EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application
Mezzetti, Enrico; Fernandez, Mikel; Bardizbanyan, Alen; Agirre, Irune; Abella Ferrer, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-06-08)
Comunicación de congreso
Acceso abiertoMeasurement-based timing analysis approaches are increasingly making their way into several industrial domains on account of their good cost-benefit ratio. The trustworthiness of those methods, however, suffers from the ... -
EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis
Ziccardi, Marco; Mezzetti, Enrico; Vardanega, Tullio; Abella Ferrer, Jaume; Cazorla, Francisco J. (IEEE, 2016-01-18)
Comunicación de congreso
Acceso abiertoMeasurement-based probabilistic timing analysis (MBPTA) computes trustworthy upper bounds to the execution time of software programs. MBPTA has the connotation, typical of measurement-based techniques, that the bounds ... -
Fitting processor architectures for measurement-based probabilistic timing analysis
Kosmidis, Leonidas; Quiñones, Eduardo; Abella Ferrer, Jaume; Vardanega, Tullio; Hernández, Carles; Gianarro, Andrea; Broster, Ian; Cazorla Almeida, Francisco Javier (2016-11-01)
Artículo
Acceso abiertoThe pressing market demand for competitive performance/cost ratios compels Critical Real-Time Embedded Systems industry to employ feature-rich hardware. The ensuing rise in hardware complexity however makes worst-case ... -
Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262
Agirre, Irune; Cazorla, Francisco J.; Abella Ferrer, Jaume; Hernandez, Carles; Mezzetti, Enrico; Azkarate-askasua, Mikel; Vardanega, Tullio (IEEE, 2018-09-01)
Acceso abiertoCar manufacturers relentlessly replace or augment the functionality of mechanical subsystems with electronic components. Most such subsystems (e.g., steer-by-wire) are safety related, hence, subject to regulation. ISO-26262, ... -
Measurement-based timing analysis of the AURIX caches
Kosmidis, Leonidas; Compagnin, Davide; Morales, David; Mezzetti, Enrico; Quiñones, Eduardo; Abella Ferrer, Jaume; Vardanega, Tullio; Cazorla Almeida, Francisco Javier (Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2016)
Texto en actas de congreso
Acceso abiertoCache memories are one of the hardware resources with higher potential to reduce worst-case execution time (WCET) costs for software programs with tight real-time constraints. Yet, the complexity of cache analysis has ... -
Mitigating software-instrumentation cache effects in measurement-based timing analysis
Díaz, Enrique; Abella Ferrer, Jaume; Mezzetti, Enrico; Aguirre, Irune; Azkarate-Askasua, Mikel; Vardanega, Tullio; Cazorla, Francisco (Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2016)
Texto en actas de congreso
Acceso abiertoMeasurement-based timing analysis (MBTA) is often used to determine the timing behaviour of software programs embedded in safety-aware real-time systems deployed in various industrial domains including automotive and ... -
On uses of extreme value theory fit for industrial-quality WCET analysis
Milutinovic, Suzana; Mezzetti, Enrico; Abella Ferrer, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (IEEE, 2017-07-31)
Comunicación de congreso
Acceso abiertoOver the last few years, considerable interest has arisen in measurement-based probabilistic timing analysis. The term MBPTA has been used to indistinctly refer to a variety of different applications of Extreme Value Theory ... -
Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey
Cazorla, Francisco J.; Kosmidis, Leonidas; Mezzetti, Enrico; Hernandez, Carles; Abella Ferrer, Jaume; Vardanega, Tullio (ACM, 2019-02-01)
Artículo
Acceso abiertoThe unabated increase in the complexity of the hardware and software components of modern embedded real-time systems has given momentum to a host of research in the use of probabilistic and statistical techniques for timing ... -
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis
Cazorla, Francisco J.; Abella Ferrer, Jaume; Andersson, Jan; Vardanega, Tullio; Vatrinet, Francis; Bate, Iain; Broster, Ian; Azkarate-askasua, Mikel; Wartel, Franck; Cucu, Liliana; Cros, Fabrice; Farrall, Glenn; Gogonel, Adriana; Gianarro, Andrea; Triquet, Benoit; Hernandez, Carles; Lo, Code; Maxim, Cristian; Morales, David; Quiñones, Eduardo; Mezzetti, Enrico; Kosmidis, Leonidas; Aguirre, Irune; Fernandez, Mikel; Slijepcevic, Mladen; Conmy, Philippa; Talaboulma, Walid (IEEE, 2016-08-31)
Comunicación de congreso
Acceso abiertoThe use of increasingly complex hardware and software platforms in response to the ever rising performance demands of modern real-time systems complicates the verification and validation of their timing behaviour, which ... -
Reconciling Time Predictability and Performance in Future Computing Systems
Cazorla, Francisco J.; Abella Ferrer, Jaume; Mezzetti, Enrico; Hernandez, Carles; Vardanega, Tullio; Bernat, Guillem (IEEE, 2018-04)
Artículo
Acceso abiertoMBTA studies the system’s timing in analysis scenarios, to determine upper bounds to the worst-case execution-time behavior that may occur at operation. MBTA’s challenge is to construct analysis-time scenarios that help ... -
Seeking time-composable partitions of tasks for COTS multicore processors
Fernández, Gabriel; Abella Ferrer, Jaume; Quiñones, Eduardo; Fossati, Luca; Zulianello, Marco; Vardanega, Tullio; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2015)
Comunicación de congreso
Acceso abiertoThe timing verification of real-time single core systems involves a timing analysis step that yields an Execution Time Bound (ETB) for each task, followed by a schedulability analysis step, where the scheduling attributes ... -
Software Time Reliability in the Presence of Cache Memories
Milutinovic, Suzana; Abella Ferrer, Jaume; Agirre, Irune; Azkarate-Askasua, Mikel; Mezzetti, Enrico; Vardanega, Tullio; Cazorla, Francisco J. (Springer International Publishing, 2017-05-30)
Comunicación de congreso
Acceso abiertoThe use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. In the presence of caches, the worst-case timing behavior of a system heavily depends on how code and data are laid out ...