Now showing items 1-9 of 9

  • Atomic dataflow model 

    Gajinov, Vladimir (Universitat Politècnica de Catalunya, 2014-11-20)
    Doctoral thesis
    Open Access
    With the recent switch in the design of general purpose processors from frequency scaling of a single processor core towards increasing the number of processor cores, parallel programming became important not only for ...
  • Circuit designs for increasing reliability and reducing energy 

    Seyedi, Azamolsadat (Universitat Politècnica de Catalunya, 2016-02-02)
    Doctoral thesis
    Open Access
    Computing technology has witnessed an inimitable progress in the last decades which is the result of CMOS technology scaling commensurate with Moore's law. Transistor feature sizes have shrunk to half at each generation, ...
  • Designs for increasing reliability while reducing energy and increasing lifetime 

    Yalcin, Gulay (Universitat Politècnica de Catalunya, 2014-12-12)
    Doctoral thesis
    Open Access
    In the last decades, the computing technology experienced tremendous developments. For instance, transistors' feature size shrank to half at every two years as consistently from the first time Moore stated his law. ...
  • Enhancing the efficiency and practicality of software transactional memory on massively multithreaded systems 

    Kestor, Gökçen (Universitat Politècnica de Catalunya, 2013-03-22)
    Doctoral thesis
    Open Access
    Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one stream of instructions in parallel. To exploit CMT's capabilities, programmers have to parallelize their applications, ...
  • Extending the applicability of deterministic multithreading 

    Nowack, Vesna (Universitat Politècnica de Catalunya, 2016-01-12)
    Doctoral thesis
    Open Access
    With the increased number of cores on a single processor chip, an application can achieve good performance if it splits the execution into multiple threads that run on multiple cores at the same time. To synchronize threads, ...
  • Hardware thread scheduling algorithms for single-ISA asymmetric CMPs 

    Markovic, Nikola (Universitat Politècnica de Catalunya, 2015-12-22)
    Doctoral thesis
    Open Access
    Through the past several decades, based on the Moore's law, the semiconductor industry was doubling the number of transistors on the single chip roughly every eighteen months. For a long time this continuous increase in ...
  • Techniques for improving the performance of software transactional memory 

    Stipić, Srđan (Universitat Politècnica de Catalunya, 2014-07-21)
    Doctoral thesis
    Open Access
    Transactional Memory (TM) gives software developers the opportunity to write concurrent programs more easily compared to any previous programming paradigms and gives a performance comparable to lock-based synchronization ...
  • Techniques to improve concurrency in hardware transactional memory 

    Armejach Sanosa, Adrià (Universitat Politècnica de Catalunya, 2014-06-13)
    Doctoral thesis
    Open Access
    Transactional Memory (TM) aims to make shared memory parallel programming easier by abstracting away the complexity of managing shared data. The programmer defines sections of code, called transactions, which the TM system ...
  • Towards lightweight and high-performance hardware transactional memory 

    Tomić, Sasa (Universitat Politècnica de Catalunya, 2012-07-13)
    Doctoral thesis
    Open Access
    Conventional lock-based synchronization serializes accesses to critical sections guarded by the same lock. Using multiple locks brings the possibility of a deadlock or a livelock in the program, making parallel programming ...