Now showing items 1-10 of 10

  • Implementing Kilo-Instruction multiprocessors 

    Vallejo, Enrique; Galluzzi, Marco; Cristal Kestelman, Adrián; Vallejo, Fernando; Beivide Palacio, Ramon; Stenström, Per; Smith, James E.; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Conference report
    Open Access
    Multiprocessors are coming into wide-spread use in many application areas, yet there are a number of challenges to achieving a good tradeoff between complexity and performance. For example, while implementing memory coherence ...
  • Implementing kilo-instruction multiprocessors 

    Vallejo, Enrique; Galluzzi, Marco; Cristal Kestelman, Adrián; Vallejo, Fernando; Beivide Palacio, Ramon; Stenström, Per; Smith, James E.; Valero Cortés, Mateo (2005)
    External research report
    Open Access
    Multiprocessors are coming into wide-spread use in many application areas, yet there are a number of challenges to achieving a good tradeoff between complexity and performance. For example, while implementing memory coherence ...
  • Implicit transactional memory in chip multiprocessors 

    Galluzzi, Marco; Vallejo, Enrique; Cristal Kestelman, Adrián; Vallejo, Fernando; Beivide Palacio, Ramon; Stenström, Per; Smith, James E.; Valero Cortés, Mateo (2007-06)
    External research report
    Open Access
    Chip Multiprocessors (CMPs) are an efficient way of designing and use the huge amount of transistors on a chip. Different cores on a chip can compose a shared memory system with a very low-latency interconnect at a very ...
  • Implicit transactional memory in kilo-instruction multiprocessors 

    Galluzzi, Marco; Vallejo, Enrique; Cristal Kestelman, Adrián; Vallejo, Fernando; Beivide Palacio, Julio Ramon; Stenström, Per; Smith, James E.; Valero Cortés, Mateo (2007-06)
    External research report
    Open Access
    Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of combining a number of such multi-core ...
  • Multicore resource management 

    Nesbit, Kyle J.; Smith, James E.; Moreto Planas, Miquel; Cazorla, Francisco; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2008-06)
    Article
    Open Access
    Current resource management mechanisms and policies are inadequate for future multicore systems. Instead, a hardware/software interface based on the virtual private machine abstraction would allow software policies to ...
  • Out-of-order vector architectures 

    Espasa Sans, Roger; Valero Cortés, Mateo; Smith, James E. (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    Register renaming and out-of-order instruction issue are now commonly used in superscalar processors. These techniques can also be used to significant advantage in vector processors, as this paper shows. Performance is ...
  • Reverse-engineering the brain from a computer architecture perspective 

    Smith, James E. (Barcelona Supercomputing Center, 2018)
    Conference report
    Open Access
  • Software-controlled operand-gating 

    Canal Corretger, Ramon; González Colás, Antonio María; Smith, James E. (IEEE Computer Society, 2004)
    Conference report
    Open Access
    Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method for implementing software-controlled power ...
  • Solving multiprocessor drawbacks with kilo-instruction processors 

    Vallejo, Enrique; Galluzzi, Marco; Cristal Kestelman, Adrián; Vallejo, Fernando; Beivide Palacio, Ramon; Stenström, Per; Smith, James E.; Valero Cortés, Mateo (2005)
    External research report
    Open Access
    Nowadays, a good multiprocessor system design has to deal with many drawbacks in order to achieve a good tradeoff between complexity and performance. For example, while solving problems like coherence and consistency is ...
  • Very low power pipelines using significance compression 

    Canal Corretger, Ramon; González Colás, Antonio María; Smith, James E. (Institute of Electrical and Electronics Engineers (IEEE), 2000)
    Conference report
    Open Access
    Data, addresses, and instructions are compressed by maintaining only significant bytes with two or three extension bits appended to indicate the significant byte positions. This significance compression method is integrated ...