Now showing items 1-20 of 30

  • A class of stable nonlinear systems for modelling memory effects in RF power amplifiers 

    Montoro López, Gabriel; Gilabert Pinal, Pere Lluís; Berenguer Sau, Jordi; Bertran Albertí, Eduardo (Escuela Politécnica Superior Ingeniería Gijón, 2006)
    Conference report
    Open Access
  • Advanced pattern based memory controller for FPGA based HPC applications 

    Hussain, Tassadaq; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Restricted access - publisher's policy
    The ever-increasing complexity of high-performance computing applications limits performance due to memory constraints in FPGAs. To address this issue, we propose the Advanced Pattern based Memory Controller (APMC), which ...
  • A hierarchical mathematical model for automatic pipelining and allocation using elastic systems 

    Cortadella, Jordi; Petit Silvestre, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2018)
    Conference report
    Open Access
    The advent of FPGA-based accelerators has encouraged the use of high-level synthesis (HLS) for rapid prototyping and design space exploration. In this context, design optimization at behavioral level becomes a critical ...
  • AMC: Advanced Multi-accelerator Controller 

    Hussain, Tassadaq; Haider, Amna; Gursal, Shakaib A.; Ayguadé Parra, Eduard (2015-01)
    Article
    Open Access
    The rapid advancement, use of diverse architectural features and introduction of High Level Synthesis (HLS) tools in FPGA technology have enhanced the capacity of data-level parallelism on a chip. A generic FPGA based HLS ...
  • A method for real-time generation of slew-rate limited envelopes in envelope tracking transmitters 

    Montoro López, Gabriel; Gilabert Pinal, Pere Lluís; Bertran Albertí, Eduardo; Berenguer Sau, Jordi (2010-02)
    Conference report
    Open Access
  • AMMC: advance multi-core memory controller 

    Hussain, Tassadaq; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference lecture
    Open Access
    In this work, we propose an efficient scheduler and intelligent memory manager known as AMMC (Advanced Multi-Core Memory Controller), which proficiently handles data movement and computational tasks. The proposed AMMC ...
  • Anàlisi de la interconnexió de dispositius lògics programables mitjançant Ethernet 

    Peshevski, Marko (Universitat Politècnica de Catalunya, 2017-02-09)
    Master thesis
    Restricted access - author's decision
    En aquest treball s'estudia com fer funcionar Ethernet des d'una placa amb FPGA (de l'anglès Field Programmable Gate Array). Aquests són dispositius electrònics que permeten reprogramar la lògica que contenen dins per ...
  • Aplicación de técnicas avanzadas de lienalización a sistemas de RF/microondas 

    García, J.A.; Bertran Albertí, Eduardo; Begrains, J.; Montoro López, Gabriel; Ares, F.; Cabria, L. (Editorial de la UPV, 2005)
    Conference report
    Open Access
  • A template system for the efficient compilation of domain abstractions onto reconfigurable computers 

    Shafiq, Muhammad; Pericàs Gleim, Miquel; Ayguadé Parra, Eduard (2011)
    Conference report
    Restricted access - publisher's policy
    Past research has addressed the issue of using FPGAs as accelerators for HPC systems. However, writing low level code for an efficient, portable and scalable architecture altogether has been always a ...
  • AXIOM: a hardware-software platform for cyber physical systems 

    Mazumdar, Somnath; Ayguadé Parra, Eduard; Bettin, Nicola; Bueno Hedo, Javier; Ermini, Sara; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Montefoschi, Francesco; Oro Garcia, David; Pnevmatikatos, Dionisis; Rizzo, Antonio; Theodoropoulos, Dimitris; Giorgi, Roberto (2016)
    Conference report
    Restricted access - publisher's policy
    Cyber-Physical Systems (CPSs) are widely necessary for many applications that require interactions with the humans and the physical environment. A CPS integrates a set of hardware-software components to distribute, execute ...
  • Considerations in using OpenCL on GPUs and FPGAs for throughput-oriented genomics workloads 

    Cadenelli, Nicola; Jaksic, Zoran; Polo Bardés, Jorda; Carrera Pérez, David (Elsevier, 2019-05)
    Article
    Open Access
    The recent upsurge in the available amount of health data and the advances in next-generation sequencing are setting the ground for the long-awaited precision medicine. To process this deluge of data, bioinformatics workloads ...
  • Diseño de un linealizador adaptativo y analógico para amplificadores de potencia 

    Bertran Albertí, Eduardo; Zozaya, A; Montoro López, Gabriel; Berenguer Sau, Jordi (Congrega, 2003)
    Conference report
    Open Access
  • Disseny d'una eina de diagnòstic CAN basada en FPGA 

    Galindo Hurtado, Carlos (Universitat Politècnica de Catalunya, 2017-07-10)
    Master thesis
    Open Access
    L’objectiu d’aquest projecte és dissenyar i implementar un sistema de comunicació CAN (Controller Area Network) de baix cost sobre una plataforma FPGA complint al màxim amb la normativa ISO 11898. La metodologia empleada ...
  • FPGA-based set-up for RF power amplifier dynamic Supply with real-time digital adaptive predistortion 

    Gilabert Pinal, Pere Lluís; Montoro López, Gabriel; Bertran Albertí, Eduardo; García García, José Angel (IEEE Press and Wiley, 2010)
    Conference lecture
    Open Access
  • From plasma to beefarm: Design experience of an FPGA-based multicore prototype 

    Sonmez, Nehir; Arcas Abella, Oriol; Sayilar, Gokhan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Hur, Ibrahim; Singh, Satnam; Valero Cortés, Mateo (Springer, 2011)
    Conference report
    Open Access
    In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation, a popular research topic of the last few years ...
  • Hardware architecture implemented on FPGA for protecting cryptographic keys against side-channel attacks 

    Lumbiarres López, Rubén; López García, Mariano; Cantó Navarro, Enrique (Institute of Electrical and Electronics Engineers (IEEE), 2016-09-19)
    Article
    Open Access
    This paper presents a new hardware architecture designed for protecting the key of cryptographic algorithms against attacks by side-channel analysis (SCA). Unlike previous approaches already published, the fortress of the ...
  • Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq 

    Filgueras Izquierdo, Antonio; Gil Blasco, Eduard; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Langer, Jan; Noguera Serra, Juan José (Institute of Electrical and Electronics Engineers (IEEE), 2013)
    Conference report
    Restricted access - publisher's policy
    OmpSs is a directive-based programming model that uses OpenMP-like directives, that allow to execute the tasks annotated on both the SMPs and as FPGA kernels on modern SoC processors, like the Xilinx Zynq platform. OmpSs ...
  • Implementació d’un servidor web en un dispositiu lògic programable 

    Cadens Roca, Pau (Universitat Politècnica de Catalunya, 2017-02-09)
    Master thesis
    Open Access
    En el present document es tracta el disseny i la implementació d’un servidor web en una FPGA usant el microprocessador encastat Microblaze de Xilinx. Aquest servidor web, conté una pàgina web la qual mostra les dades ...
  • Implementación de un Kernel LINUX sobre un procesador tipo software utilizando una FPGA 

    Vaquerizo Cid, Daniel (Universitat Politècnica de Catalunya, 2017-02-09)
    Master thesis
    Open Access
    En el mercado existen multitud de microprocesadores capaz de realizar multitud de tareas muy variadas, sin embargo, todos ellos tienen una limitación, el hardware, ya que éste no puede ser modificado una vez se fabrica ...
  • Implementación de un transmisor LINC en un procesador FPGA 

    Vizarreta Paz, Pedro Pablo; Gilabert Pinal, Pere Lluís; Montoro López, Gabriel; Berenguer Sau, Jordi (2011)
    Conference report
    Open Access