Browsing by Author "Lorenzo Ortega, Rubén"

Now showing items 1-4 of 4

    • De-RISC: the First RISC-V space-grade platform for safety-critical systems 

      Wessman, Nils-Johan; Malatesta, Fabio; Andersson, Jan; Gómez Molinero, Paco; Masmano Tello, Miguel; Nicolau Gallego, Vicente; Le Rhun, Jimmy; Cabo Pitarch, Guillem; Bas Jalón, Francisco; Lorenzo Ortega, Rubén; Sala Sucarrats, Oriol; Trilla Rodríguez, David; Abella Ferrer, Jaume (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Conference report
      Open Access
      The increasing needs for performance in the space domain for highly autonomous systems calls for more powerful space MPSoCs and appropriate hypervisors to master them. These platforms must adhere to strict reliability, ...

    • SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping 

      Bas Jalón, Francisco; Alcaide Portet, Sergi; Lorenzo Ortega, Rubén; Cabo Pitarch, Guillem; Gil Rodríguez, Guillermo; Sala Sucarrats, Oriol; Mazzocchetti, Fabio; Trilla Rodríguez, David; Abella Ferrer, Jaume (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Conference report
      Open Access
      Safety-related systems, such as those in automotive, avionics and space, impose the existence of appropriate safety measures to meet the safety requirements of the system. In the case of the highest integrity level ...

    • SafeSU: an extended statistics unit for multicore timing interference 

      Cabo Pitarch, Guillem; Bas Jalón, Francisco; Lorenzo Ortega, Rubén; Trilla Rodríguez, David; Alcaide Portet, Sergi; Moretó Planas, Miquel; Hernández Luz, Carles; Abella Ferrer, Jaume (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Conference report
      Open Access
      Statistics units (SUs) in MPSoCs are becoming increasingly used for the (1) verification and (2) validation of multicore timing interference, as well as for (3) deploying safety measures in safety-related real-time systems. ...

    • SafeTI: a hardware traffic injector for MPSoC functional and timing validation 

      Sala Sucarrats, Oriol; Alcaide Portet, Sergi; Cabo Pitarch, Guillem; Bas Jalón, Francisco; Lorenzo Ortega, Rubén; Benedicte Illescas, Pedro; Trilla Rodríguez, David; Gil Rodríguez, Guillermo; Mazzocchetti, Fabio; Abella Ferrer, Jaume (Institute of Electrical and Electronics Engineers (IEEE), 2021)
      Conference report
      Open Access
      Functional and timing validation of safety-related MPSoCs requires testing specific traffic patterns in the on-chip interconnects. Generally, testing needs to be performed by using software tests whose degree of control ...