Browsing by Author "Lavagno, Luciano"
Now showing items 1-20 of 43
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A region-based theory for state assignment in speed-independent circuits
(1997-08)
Article
Open AccessState assignment problems still need satisfactory solutions to make asynchronous circuit synthesis more practical. A well-known example of such a problem is that of complete state coding (CSC), which happens when a pair ... -
A symbolic algorithm for the synthesis of bounded Petri nets
(Springer, 2008)
Conference report
Open AccessThis paper presents an algorithm for the synthesis of bounded Petri nets from transition systems. A bounded Petri net is always provided in case it exists. Otherwise, the events are split into several transitions to guarantee ... -
Adaptive clock with useful jitter
(2015-05-19)
Research report
Open AccessThe growing variability in nanoelectronic devices due to uncertainties from the manufacturing process and environmental conditions (power supply, temperature, aging) requires increasing design guardbands, forcing circuits ... -
Automatic synthesis and optimization of partially specified asynchronous systems
(Association for Computing Machinery (ACM), 1999)
Conference report
Open AccessA method for automating the synthesis of asynchronous control circuits from high level (CSP-like) and/or partial STG (involving only functionally critical events) specifications is presented. The method solves two key ... -
Behavioral transformations to increase the noise immunity of asynchronous specifications
(Institute of Electrical and Electronics Engineers (IEEE), 1999)
Conference report
Open AccessNoise immunity is becoming one of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the problems originated by simultaneous switching ... -
Bridging modularity and optimality: delay-insensitive interfacing in asynchronous circuits synthesis
(Institute of Electrical and Electronics Engineers (IEEE), 1999)
Conference report
Open AccessTwo trends are of major concern for digital circuit designers: the relative increase of interconnect delays with respect to gate delays and the demand for design reuse. Both pose difficult problems to synchronous design ... -
CNN-on-AWS: Efficient allocation of multikernel applications on Multi-FPGA platforms
(2021-02)
Article
Open AccessMulti-FPGA platforms, like Amazon AWS F1, can run in the cloud multikernel pipelined applications, like convolutional neural networks (CNNs), with excellent performance and lower energy consumption than CPUs or GPUs. We ... -
Complete state encoding based on the theory of regions
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Conference report
Open AccessSynthesis of asynchronous circuits from Signal Transition Graphs (STGs) and/or State Graphs (SGs) involves solving state coding problems. A well-known example of such problems is that of Complete State Coding (CSC), which ... -
Coping with the variability of combinational logic delays
(Institute of Electrical and Electronics Engineers (IEEE), 2004)
Conference report
Open AccessThis paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on dual-rail encoding, and guarantees low timing overhead ... -
Decomposition and technology mapping of speed-independent circuits using Boolean relations
(Institute of Electrical and Electronics Engineers (IEEE), 1997)
Conference report
Open AccessPresents a new technique for the decomposition and technology mapping of speed-independent circuits. An initial circuit implementation is obtained in the form of a netlist of complex gates, which may not be available in ... -
Decomposition and technology mapping of speed-independent circuits using Boolean relations
(1999-09)
Article
Open AccessThis paper presents a new technique for decomposition and technology mapping of speed-independent circuits. An initial circuit implementation is obtained in the form of a netlist of complex gates, which may not be available ... -
Deriving Petri nets from finite transition systems
(Institute of Electrical and Electronics Engineers (IEEE), 1998-08)
Article
Open AccessThis paper presents a novel method to derive a Petri net from any specification model that can be mapped into a state-based representation with arcs labeled with symbols from an alphabet of events (a Transition System, ... -
Designing asynchronous circuits from behavioural specifications with internal conflicts
(Institute of Electrical and Electronics Engineers (IEEE), 1994)
Conference report
Open AccessThe paper presents a systematic method for synthesizing asynchronous circuits from event-based specifications with conflicts on output signals. It describes a set of semantic-preserving transformations performed at the ... -
Desynchronization: Synthesis of asynchronous circuits from synchronous specifications
(2006-10)
Article
Open AccessAsynchronous implementation techniques, which measure logic delays at runtime and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst case delays at design ... -
Exact and heuristic allocation of multi-kernel applications to multi-FPGA platforms
(Association for Computing Machinery (ACM), 2019-06)
Conference report
Open AccessFPGA-based accelerators demonstrated high energy efficiency compared to GPUs and CPUs. However, single FPGA designs may not achieve sufficient task parallelism. In this work, we optimize the mapping of high-performance ... -
Fast energy-optimal multi-kernel DNN-like application allocation on multi-FPGA platforms
(2022-04)
Article
Open AccessPlatforms with multiple Field Programmable Gate Arrays (FPGAs), such as Amazon Web Services (AWS) F1 instances, can efficiently accelerate multi-kernel pipelined applications, e.g., Convolutional Neural Networks for machine ... -
From synchronous to asynchronous: an automatic approach
(Institute of Electrical and Electronics Engineers (IEEE), 2004)
Conference report
Open AccessThis paper presents a methodology to derive asynchronous circuits from optimized synchronous circuits by replacing the clock distribution tree by a handshaking network. A case study shows the applicability of the method ... -
Handshake protocols for de-synchronization
(Institute of Electrical and Electronics Engineers (IEEE), 2004)
Conference report
Open AccessDe-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronization and formally proves their correctness. ... -
Hardware and Petri nets: application to asynchronous circuit design
(Springer, 2000-06)
Article
Open AccessAsynchronous circuits is a discipline in which the theory of concurrency is applied to hardware design. This paper presents an overview of a design framework in which Petri nets are used as the main behavioral model for ... -
Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings
(Institute of Electrical and Electronics Engineers (IEEE), 1998)
Conference report
Open AccessState coding conflict detection is a fundamental part of synthesis of asynchronous concurrent systems from their specifications as signal transition graphs (STGs), which are a special kind of labelled Petri nets. The paper ...
