Now showing items 1-7 of 7

  • Compartición de espacio entre instrucciones 

    Rodríguez Lafuente, Clemente; Viñals Yúfera, Víctor; Labarta, Jesús (E.T.S.I. de Telecomunicación, 1985)
    Conference report
    Open Access
    Un gran número de computadores en la actualidad usan memoria cache para adaptar la velocidad de la memoria a la del procesador, o bien reducir el tráfico en sistemas multiprocesadores. En la actualidad un tema discutido ...
  • Improving the integration of task nesting and dependencies in OpenMP 

    Pérez, Josep M.; Beltran Querol, Vicenç; Labarta, Jesús; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2017)
    Conference report
    Open Access
    The tasking model of OpenMP 4.0 supports both nesting and the definition of dependences between sibling tasks. A natural way to parallelize many codes with tasks is to first taskify the high-level functions and then to ...
  • MPI+X: task-based parallelization and dynamic load balance of finite element assembly 

    Garcia-Gasulla, Marta; Houzeaux, Guillaume; Ferrer, Roger; Artigues, Antoni; López, Victor; Labarta, Jesús; Vázquez, Mariano (Taylor & Francis, 2018)
    Article
    Open Access
    The main computing tasks of a finite element code(FE) for solving partial differential equations (PDE's) are the algebraic system assembly and the iterative solver. This work focuses on the first task, in the context of ...
  • Multiple target task sharing support for the OpenMP accelerator model 

    Ozen, Guray; Mateo, Sergi; Ayguadé Parra, Eduard; Labarta, Jesús; Beyer, James B. (Springer, 2016)
    Conference report
    Restricted access - publisher's policy
    The use of GPU accelerators is becoming common in HPC platforms due to the their effective performance and energy efficiency. In addition, new generations of multicore processors are being designed with wider vector units ...
  • MUSA: a multi-level simulation approach for next-generation HPC machines 

    Grass, Thomas; Allande, César; Armejach, Adrià; Rico, Alejandro; Ayguadé Parra, Eduard; Labarta, Jesús; Valero Cortés, Mateo; Casas, Marc; Moreto Planas, Miquel (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Conference report
    Restricted access - publisher's policy
    The complexity of High Performance Computing (HPC) systems is increasing in the number of components and their heterogeneity. Interactions between software and hardware involve many different aspects which are typically ...
  • The secrets of the accelerators unveiled: tracing heterogeneous executions through OMPT 

    Llort, German; Filgueras Izquierdo, Antonio; Jiménez-González, Daniel; Servat, Harald; Teruel, Xavier; Mercadal, Estanislao; Álvarez, Carlos; Giménez, Judit; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta, Jesús (Springer, 2016)
    Conference report
    Restricted access - publisher's policy
    Heterogeneous systems are an important trend in the future of supercomputers, yet they can be hard to program and developers still lack powerful tools to gain understanding about how well their accelerated codes perform ...
  • Understanding memory access patterns using the BSC performance tools 

    Servat, Harald; Labarta, Jesús; Hoppe, Hans-Christian; Giménez, Judit; Peña, Antonio J. (Elsevier, 2018-10)
    Article
    Restricted access - publisher's policy
    The growing gap between processor and memory speeds has lead to complex memory hierarchies as processors evolve to mitigate such divergence by exploiting the locality of reference. In this direction, the BSC performance ...