Now showing items 1-20 of 32

  • A region-based theory for state assignment in speed-independent circuits 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (1997-08)
    Article
    Open Access
    State assignment problems still need satisfactory solutions to make asynchronous circuit synthesis more practical. A well-known example of such a problem is that of complete state coding (CSC), which happens when a pair ...
  • A symbolic algorithm for the synthesis of bounded Petri nets 

    Carmona Vargas, Josep; Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (Springer, 2008)
    Conference report
    Open Access
    This paper presents an algorithm for the synthesis of bounded Petri nets from transition systems. A bounded Petri net is always provided in case it exists. Otherwise, the events are split into several transitions to guarantee ...
  • Automatic synthesis and optimization of partially specified asynchronous systems 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Lavagno, Luciano; Yakovlev, Alex (Association for Computing Machinery (ACM), 1999)
    Conference report
    Open Access
    A method for automating the synthesis of asynchronous control circuits from high level (CSP-like) and/or partial STG (involving only functionally critical events) specifications is presented. The method solves two key ...
  • Behavioral transformations to increase the noise immunity of asynchronous specifications 

    Taubin, Alexander; Kondratyev, Alex; Cortadella, Jordi; Lavagno, Luciano (Institute of Electrical and Electronics Engineers (IEEE), 1999)
    Conference report
    Open Access
    Noise immunity is becoming one of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the problems originated by simultaneous switching ...
  • Bridging modularity and optimality: delay-insensitive interfacing in asynchronous circuits synthesis 

    Saito, Hiroshi; Kondratyev, Alex; Cortadella, Jordi; Lavagno, Luciano; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1999)
    Conference report
    Open Access
    Two trends are of major concern for digital circuit designers: the relative increase of interconnect delays with respect to gate delays and the demand for design reuse. Both pose difficult problems to synchronous design ...
  • Checking signal transition graph implementability by symbolic bdd traversal 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Pastor Llorens, Enric; Roig Mansilla, Oriol; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1995)
    Conference report
    Open Access
    This paper defines conditions for a Signal Transition Graph to be implemented by an asynchronous circuit. A hierarchy of the implementability classes is presented. Our main concern is the implementability of the specification ...
  • Complete state encoding based on the theory of regions 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1996)
    Conference report
    Open Access
    Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) and/or State Graphs (SGs) involves solving state coding problems. A well-known example of such problems is that of Complete State Coding (CSC), which ...
  • Coping with the variability of combinational logic delays 

    Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Sotiriou, Christos P. (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Conference report
    Open Access
    This paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on dual-rail encoding, and guarantees low timing overhead ...
  • Decomposition and technology mapping of speed-independent circuits using Boolean relations 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Pastor Llorens, Enric; Yakovlev, Alex (1999-09)
    Article
    Open Access
    This paper presents a new technique for decomposition and technology mapping of speed-independent circuits. An initial circuit implementation is obtained in the form of a netlist of complex gates, which may not be available ...
  • Decomposition and technology mapping of speed-independent circuits using Boolean relations 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Pastor Llorens, Enric; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    Presents a new technique for the decomposition and technology mapping of speed-independent circuits. An initial circuit implementation is obtained in the form of a netlist of complex gates, which may not be available in ...
  • Desynchronization: Synthesis of asynchronous circuits from synchronous specifications 

    Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Sotiriou, Christos (2006-10)
    Article
    Open Access
    Asynchronous implementation techniques, which measure logic delays at runtime and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst case delays at design ...
  • Formal verification of safety properties in timed circuits 

    Peña Basurto, Marco Antonio; Cortadella, Jordi; Kondratyev, Alex; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 2000)
    Conference report
    Open Access
    The incorporation of timing makes circuit verification computationally expensive. This paper proposes a new approach for the verification of timed circuits. Rather than calculating the exact timed stare space, a conservative ...
  • From synchronous to asynchronous: an automatic approach 

    Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Lwin, Kelvin; Sotiriou, Christos P. (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Conference report
    Open Access
    This paper presents a methodology to derive asynchronous circuits from optimized synchronous circuits by replacing the clock distribution tree by a handshaking network. A case study shows the applicability of the method ...
  • Handshake protocols for de-synchronization 

    Blunno, Ivan; Cortadella, Jordi; Kondratyev, Alex; Lavagno, Luciano; Lwin, Kelvin; Sotiriou, Christos P. (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Conference report
    Open Access
    De-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronization and formally proves their correctness. ...
  • Hardware and Petri nets: application to asynchronous circuit design 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (Springer, 2000-06)
    Article
    Open Access
    Asynchronous circuits is a discipline in which the theory of concurrency is applied to hardware design. This paper presents an overview of a design framework in which Petri nets are used as the main behavioral model for ...
  • Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Lavagno, Luciano; Taubin, Alexander; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1998)
    Conference report
    Open Access
    State coding conflict detection is a fundamental part of synthesis of asynchronous concurrent systems from their specifications as signal transition graphs (STGs), which are a special kind of labelled Petri nets. The paper ...
  • Lazy transition systems and asynchronous circuits synthesis with relative timing assumptions 

    Cortadella, Jordi; Kishinevsky, Michael; Burns, Steven M.; Kondratyev, Alex; Lavagno, Luciano; Stevens, Kenneth S.; Taubin, Alexander; Yakovlev, Alex (2002-02)
    Article
    Open Access
    This paper presents a design flow for timed asynchronous circuits. It introduces lazy transitions systems as a new computational model to represent the timing information required for synthesis. The notion of laziness ...
  • Lazy transition systems: application to timing optimization of asynchronous circuits 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Taubin, Alexander; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1998)
    Conference report
    Open Access
    The paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzTSs can be effectively used to model the ...
  • Logic decomposition of speed-independent circuits 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Lavagno, Luciano; Yakovlev, Alex (1999-02)
    Article
    Open Access
    Logic decomposition is a well-known problem in logic synthesis, but it poses new challenges when targeted to speed-independent circuits. The decomposition of a gate into smaller gates must preserve not only the functional ...
  • Methodology and tools for state encoding in asynchronous circuit synthesis 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1996)
    Conference report
    Open Access
    This paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that “behave uniformly” with respect to a given transition (value ...