Now showing items 1-3 of 3

    • Automating the application data placement in hybrid memory systems 

      Servat, Harald; Peña, Antonio J.; Llort, German; Mercadal, Estanislao; Hoppe, Hans-Christian; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Conference report
      Open Access
      Multi-tiered memory systems, such as those based on Intel® Xeon Phi™processors, are equipped with several memory tiers with different characteristics including, among others, capacity, access latency, bandwidth, energy ...
    • Integrating memory perspective into the BSC performance tools 

      Servat, Harald; Labarta Mancho, Jesús José; Hoppe, Hans-Christian; Gimenez, Judit; Peña, Antonio J. (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Conference report
      Open Access
      The growing gap between processor and memory speeds results in complex memory hierarchies as processors evolve to mitigate such differences by taking advantage of locality of reference. In this direction, the BSC performance ...
    • Understanding memory access patterns using the BSC performance tools 

      Servat, Harald; Labarta Mancho, Jesús José; Hoppe, Hans-Christian; Giménez, Judit; Peña, Antonio J. (Elsevier, 2018-10)
      Article
      Open Access
      The growing gap between processor and memory speeds has lead to complex memory hierarchies as processors evolve to mitigate such divergence by exploiting the locality of reference. In this direction, the BSC performance ...