Exploració per tema "Hardware"
Ara es mostren els items 1-20 de 150
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2018 International Symposium on Computer Architecture influential paper award
(2018-07-01)
Article
Accés obertThe International Symposium on Computer Architecture (ISCA) recognizes every year the most influential paper published in this conference 15 years earlier, based on its impact on research, development, products or ideas. ... -
A BF16 FMA is all you need for DNN training
(Institute of Electrical and Electronics Engineers (IEEE), 2022-07-01)
Article
Accés obertFused Multiply-Add (FMA) functional units constitute a fundamental hardware component to train Deep Neural Networks (DNNs). Its silicon area grows quadratically with the mantissa bit count of the computer number format, ... -
A comparison of different techniques for atmospheric artefact compensation in GBSAR differential acquisitions
(IEEE, 2006)
Text en actes de congrés
Accés obertIn this paper, a comparison of different techniques for compensating the atmospheric artifacts in Ground-Based SAR zero-baseline acquisitions at X-Band is presented. The way the fluctuation of atmospheric parameters like ... -
A confidence assessment of WCET estimates for software time randomized caches
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertObtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded systems during software verification. Measurement-Based Probabilistic Timing Analysis (MBPTA) aims at obtaining WCET estimates ... -
A dynamic pricing algorithm for a network of virtual resources
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés restringit per política de l'editorialA service chain is a combination of network services (e.g. network address translation (NAT), a firewall, etc.) that are interconnected to support an application (e.g. video-on-demand). Building a service chain requires a ... -
A generator of numerically-tailored and high-throughput accelerators for batched GEMMs
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertWe propose a hardware generator of GEMM accelerators. Our generator produces vendor-agnostic HDL describing highly customizable systolic arrays guided by accuracy and energy efficiency goals. The generated arrays have three ... -
A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness
(ACM, 2013)
Text en actes de congrés
Accés obertComputing workloads often contain a mix of interactive, latency-sensitive foreground applications and recurring background computations. To guarantee responsiveness, interactive and batch applications are often run on ... -
A hardware/software architecture for UAV payload and mission control
(2006)
Text en actes de congrés
Accés obertThis paper presents an embedded hardware/software architecture specially designed to be applied on mini/micro Unmanned Aerial Vehicles (UAV). An UAV is low-cost non-piloted airplane designed to operate in D-cube ... -
A low-power, high-performance speech recognition accelerator
(Institute of Electrical and Electronics Engineers (IEEE), 2019-12-01)
Article
Accés obertAutomatic Speech Recognition (ASR) is becoming increasingly ubiquitous, especially in the mobile segment. Fast and accurate ASR comes at high energy cost, not being affordable for the tiny power-budgeted mobile devices. ... -
A multi-radix approach to asynchronous division
(Institute of Electrical and Electronics Engineers (IEEE), 2001)
Text en actes de congrés
Accés obertThe speed of high-radix digit-recurrence dividers is mainly determined by the hardware complexity of the quotient-digit selection function. In this paper we present a scheme that combines the area efficiency of bundled ... -
A quantitative assessment of thread-level speculation techniques
(Institute of Electrical and Electronics Engineers (IEEE), 2000)
Text en actes de congrés
Accés obertSpeculative thread-level parallelism has been recently proposed as an alternative source of parallelism that can boost the performance for applications where independent threads are hard to find. Several schemes to exploit ... -
A solution for robotized sampling in wastewater plants
(IEEE Press, 2016)
Text en actes de congrés
Accés obertThis work presents a solution to automatize the water sampling process of outdoor basins in a wastewater treatment plant. The system proposed is based on the utilization of collaborative robotics: a team of an UAV and a ... -
A trace-scaling agent for parallel application tracing
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
Text en actes de congrés
Accés obertTracing and performance analysis tools are an important component in the development of high performance applications. Tracing parallel programs with current tracing tools, however, easily leads to large trace files with ... -
Achieving diverse redundancy for GPU Kernels
(Institute of Electrical and Electronics Engineers (IEEE), 2022-04)
Article
Accés obertAutonomous driving requires high-performance computing devices including general-purpose CPUs as well as specific accelerators, with GPUs having a key role due to their flexibility. Safety-critical microcontrollers have ... -
Acondicionamiento de sensores capacitivos
(Universitat Politècnica de Catalunya, 2010-07-05)
Projecte/Treball Final de Carrera
Accés restringit per decisió de l'autorLos sensores son componentes de instrumentación cuyo objetivo principal es detectar una magnitud física del entorno y transforarla en una magnitud eléctrica. El posterior tratamiento de esta señal permite valorar la ... -
Adaptive memory hierarchies for next generation tiled microarchitectures
(Universitat Politècnica de Catalunya, 2011-07-05)
Tesi
Accés obertLes últimes dècades el rendiment dels processadors i de les memòries ha millorat a diferent ritme, limitant el rendiment dels processadors i creant el conegut memory gap. Sol·lucionar aquesta diferència de rendiment és un ... -
Advanced Interferometer development for precise geostationary satellite tracking
(Universitat Politècnica de Catalunya, 2021-02-10)
Treball Final de Grau
Accés restringit per acord de confidencialitat -
Aging Assessment and Design Enhancement of Randomized Cache Memories
(Institute of Electrical and Electronics Engineers (IEEE), 2017-01-17)
Article
Accés obertCritical real-time systems require the estimation of the worst-case execution time (WCET) for scheduling purposes and resource budgeting. Measurement-based probabilistic timing analysis (MBPTA) has been shown recently as ... -
Ampliación de una fábrica destinada a la elaboración de pienso animal
(Universitat Politècnica de Catalunya, 2016-02)
Projecte Final de Màster Oficial
Accés restringit per decisió de l'autorEn este proyecto se ha realizado una ampliación de unas instalaciones reales destinadas a la elaboración de pienso animal. Para poder alcanzar este objetivo se ha llevado acabo un estudio de la instalación, de esta manera ... -
An approach for detecting power peaks during testing and breaking systematic pathological behavior
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Text en actes de congrés
Accés obertThe verification and validation process of embedded critical systems requires providing evidence of their functional correctness and also that their non-functional behavior stays within limits. In this work, we focus on ...