Browsing by Author "Ferrer Ibañez, Roger"

Now showing items 1-5 of 5

    • Acceleration with long vector architectures: Implementation and evaluation of the FFT kernel on NEC SX-Aurora and RISC-V vector extension 

      Vizcaíno Serrano, Pablo; Mantovani, Filippo; Ferrer Ibañez, Roger; Labarta Mancho, Jesús José (Wiley (John Wiley & Sons), 2023-09-10)
      Article
      Open Access
      Novel architectures leveraging long and variable vector lengths like the NEC SX-Aurora or the vector extension of RISCV are appearing as promising solutions on the supercomputing market. These architectures often require ...

    • An OpenMP free agent threads implementation 

      López, Victor; Criado Ledesma, Joel; Peñacoba Veigas, Raúl; Ferrer Ibañez, Roger; Teruel García, Xavier; Garcia Gasulla, Marta (Springer, 2021)
      Conference report
      Open Access
      In this paper, we introduce a design and implementation of the free agent threads for OpenMP. These threads increase the malleability of the OpenMP programming model, offering resource managers and runtime systems flexibility ...

    • Carrer Baixada de Viladecols. 2010. 

      Ferrer Ibañez, Roger (2010-12-12)
      Image
      Open Access
      Imatge en blanc i negre del Carrer Baixada de Viladecols. Entre 1770-1775 la Escuela Gratuita de Náutica (actual Facultat de Nàutica de Barcelona) va estar situada a aquest carrer al domicili de Raimon Bosch.

    • DPU Offloading Programming with the OpenMP API 

      Usman, Muhammad; Iserte, Sergio; Ferrer Ibañez, Roger; Peña, Antonio (Association for Computing Machinery (ACM), 2023-11)
      Conference lecture
      Open Access
      Data processing units (DPUs) as network co-processors are an emerging trend in our community, with plenty of opportunities yet to be explored. These have been generally used as domain-specific accelerators transparent to ...

    • Software development vehicles to enable extended and early co-design: a RISC-V and HPC case of study 

      Mantovani, Filippo; Vizcaíno Serrano, Pablo; Banchelli Gracia, Fabio; Garcia Gasulla, Marta; Ferrer Ibañez, Roger; Ieronymakis, Georgios; Dimou, Nikolaus; Papaefstathiou, Vassilis; Labarta Mancho, Jesús José (Springer, 2023)
      Conference report
      Open Access
      Prototyping HPC systems with low-to-mid technology readiness level (TRL) systems is critical for providing feedback to hardware designers, the system software team (e.g., compiler developers), and early adopters from the ...