Browsing by Author "Fernández, Mikel"
Now showing items 1-8 of 8
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Automatic generation and testing of application specific hardware accelerators on a new reconfigurable OpenSPARC platform
(2011)
Conference report
Open AccessSpecific hardware customization for scientific applications has shown a big potential to address the current holy grail in computer architecture: reducing power consumption while increasing performance. In particular, the ... -
Contention-aware performance monitoring counter support for real-time MPSoCs
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Conference lecture
Open AccessTasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, complicating task timing analysis and deriving execution time bounds. Understanding the Actual Contention Delay (ACD) each task ... -
Improving early design stage timing modeling in multicore based real-time systems
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Conference report
Open AccessThis paper presents a modelling approach for the timing behavior of real-time embedded systems (RTES) in early design phases. The model focuses on multicore processors - accepted as the next computing platform for RTES - ... -
MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding
(Springer International Publishing, 2017-05-30)
Conference lecture
Open AccessIn critical domains, reliable software execution is increasingly involving aspects related to the timing dimension. This is due to the advent of high-performance (complex) hardware, used to provide the rising levels of ... -
On the reliability of hardware event monitors in MPSoCs for critical domains
(Association for Computing Machinery (ACM), 2020)
Conference report
Open AccessPerformance Monitoring Units (PMUs) are at the heart of most-advanced timing analysis techniques to control and bound the impact of contention in Commercial Off-The-Shelf (COTS) SoCs with shared resources (e.g. GPUs and ... -
pTNoC: Probabilistically time-analyzable tree-based NoC for mixed-criticality systems
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Conference report
Open AccessThe use of networks-on-chip (NoC) in real-time safety-critical multicore systems challenges deriving tight worst-case execution time (WCET) estimates. This is due to the complexities in tightly upper-bounding the contention ... -
STT-MRAM for real-time embedded systems: performance and WCET implications
(Association for Computing Machinery (ACM), 2019)
Conference report
Open AccessSTT-MRAM is an emerging non-volatile memory quickly approaching DRAM in terms of capacity, frequency and device size. Intensified efforts in STT-MRAM research by the memory manufacturers may indicate a revolution with ... -
Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study
(Schloss Dagstuhl – Leibniz-Zentrum für Informatik, 2020)
Conference lecture
Open AccessThe demand for increased computing performance is driving industry in critical-embedded systems (CES) domains, e.g. space, towards the use of multicores processors. Multicores, however, pose several challenges that must ...
