• Automatic generation and testing of application specific hardware accelerators on a new reconfigurable OpenSPARC platform 

      González Álvarez, Cecilia; Fernández, Mikel; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier (2011)
      Texto en actas de congreso
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      Specific hardware customization for scientific applications has shown a big potential to address the current holy grail in computer architecture: reducing power consumption while increasing performance. In particular, the ...
    • Contention-aware performance monitoring counter support for real-time MPSoCs 

      Jalle Ibarra, Javier; Fernández, Mikel; Abella Ferrer, Jaume; Andersson, Jan; Patte, Mathieu; Fossati, Luca; Zulianello, Marco; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Comunicación de congreso
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      Tasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, complicating task timing analysis and deriving execution time bounds. Understanding the Actual Contention Delay (ACD) each task ...
    • Improving early design stage timing modeling in multicore based real-time systems 

      Trilla, David; Jalle Ibarra, Javier; Fernández, Mikel; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Texto en actas de congreso
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      This paper presents a modelling approach for the timing behavior of real-time embedded systems (RTES) in early design phases. The model focuses on multicore processors - accepted as the next computing platform for RTES - ...
    • MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding 

      Díaz, Enrique; Fernández, Mikel; Kosmidis, Leonidas; Mezzetti, Enrico; Hernandez, Carles; Abella Ferrer, Jaume; Cazorla, Francisco J. (Springer International Publishing, 2017-05-30)
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      In critical domains, reliable software execution is increasingly involving aspects related to the timing dimension. This is due to the advent of high-performance (complex) hardware, used to provide the rising levels of ...
    • On the reliability of hardware event monitors in MPSoCs for critical domains 

      Barrera Herrera, Javier Enrique; Kosmidis, Leonidas; Tabani, Hamid; Mezzetti, Enrico; Abella Ferrer, Jaume; Fernández, Mikel; Bernat Nicolau, Guillem Joan; Cazorla Almeida, Francisco Javier (Association for Computing Machinery (ACM), 2020)
      Texto en actas de congreso
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      Performance Monitoring Units (PMUs) are at the heart of most-advanced timing analysis techniques to control and bound the impact of contention in Commercial Off-The-Shelf (COTS) SoCs with shared resources (e.g. GPUs and ...
    • pTNoC: Probabilistically time-analyzable tree-based NoC for mixed-criticality systems 

      Slijepcevic, Mladen; Fernández, Mikel; Hernández, Carles; Abella Ferrer, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Texto en actas de congreso
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      The use of networks-on-chip (NoC) in real-time safety-critical multicore systems challenges deriving tight worst-case execution time (WCET) estimates. This is due to the complexities in tightly upper-bounding the contention ...
    • STT-MRAM for real-time embedded systems: performance and WCET implications 

      Asifuzzaman, Kazi; Fernández, Mikel; Radojkovic, Petar; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Association for Computing Machinery (ACM), 2019)
      Texto en actas de congreso
      Acceso abierto
      STT-MRAM is an emerging non-volatile memory quickly approaching DRAM in terms of capacity, frequency and device size. Intensified efforts in STT-MRAM research by the memory manufacturers may indicate a revolution with ...
    • Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study 

      Palomo, Xavier; Girbal, Sylvain; Abella Ferrer, Jaume; Rioux, Laurent; Fernández, Mikel; Mezzetti, Enrico; Cazorla Almeida, Francisco Javier (Schloss Dagstuhl – Leibniz-Zentrum für Informatik, 2020)
      Comunicación de congreso
      Acceso abierto
      The demand for increased computing performance is driving industry in critical-embedded systems (CES) domains, e.g. space, towards the use of multicores processors. Multicores, however, pose several challenges that must ...