Now showing items 1-20 of 92

  • A cache design for probabilistically analysable real-time systems 

    Kosmidis, Leonidas; Abella Ferrer, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier (2013)
    Conference report
    Restricted access - publisher's policy
    Caches provide significant performance improvements, though their use in real-time industry is low because current WCET analysis tools require detailed knowledge of program's cache accesses to provide tight WCET estimates. ...
  • A confidence assessment of WCET estimates for software time randomized caches 

    Benedicte Illescas, Pedro; Kosmidis, Leonidas; Quiñones, Eduardo; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Conference report
    Open Access
    Obtaining Worst-Case Execution Time (WCET) estimates is a required step in real-time embedded systems during software verification. Measurement-Based Probabilistic Timing Analysis (MBPTA) aims at obtaining WCET estimates ...
  • A frequency-based approach for the detection and classification of structural changes using t-SNE 

    Agis Cherta, David; Pozo Montero, Francesc (Multidisciplinary Digital Publishing Institute (MDPI), 2019-11-21)
    Article
    Open Access
    This work presents a structural health monitoring (SHM) approach for the detection and classification of structural changes. The proposed strategy is based on t-distributed stochastic neighbor embedding (t-SNE), a nonlinear ...
  • A highly scalable parallel implementation of H.264 

    Azevedo, Arnaldo; Juurlink, Ben; Meenderinck, Cor; Terechko, Andrei; Hoogerbrugge, Jan; Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2011)
    Article
    Open Access
    Developing parallel applications that can harness and efficiently use future many-core architectures is the key challenge for scalable computing systems. We contribute to this challenge by presenting a parallel implementation ...
  • A low cost split-issue technique to improve performance of SMT clustered VLIW processors 

    Gupta, Manoj; Sánchez Carracedo, Fermín; Llosa Espuny, José Francisco (2010)
    Conference report
    Open Access
    Abstract—Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreading (SMT) is a popular technique for ...
  • An evaluation of different DLP alternatives for the embedded media domain 

    Salamí San Juan, Esther; Corbal San Adrián, Jesús; Valero Cortés, Mateo; Espasa Sans, Roger (1999)
    Conference report
    Open Access
    The importance of media processing has produced a revolution in the design of embedded processors. In order to face the high computational and technological demands of near future media applications, new embedded processors ...
  • Architectural support for real-time task scheduling in SMT processors 

    Cazorla Almeida, Francisco Javier; Knijnenburg, Peter M.W.; Sakellariou, Rizos; Fernández, Enrique; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2005)
    External research report
    Open Access
    In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architectures suitable for use in embedded systems. ...
  • A streaming machine description and programming model 

    Carpenter, Paul; Ródenas Picó, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (2007-07)
    Article
    Restricted access - publisher's policy
    In this paper we present the initial development of a streaming environment based on a programming model and machine description. The stream programming model consists of an extension to the C language and it’s translation ...
  • Automatització de testing i validació per aplicacions C en sistemes encastats 

    Grífol Álvarez, Aleix (Universitat Politècnica de Catalunya, 2018-10)
    Bachelor thesis
    Restricted access - author's decision
    Covenantee:  Ficosa Electronics
    En aquest treball de final de grau, es desenvoluparà una metodologia de treball amb una sèrie d'eines, que un cop integrades dins d'un projecte dedicat al desenvolupament de software, es permeti i faciliti la creació de ...
  • Captura, presentació i processament de les dades d'un sensor NIR industrial 

    Marín Corbera, Jordi (Universitat Politècnica de Catalunya, 2011-07-20)
    Master thesis (pre-Bologna period)
    Restricted access - author's decision
    English: This project provides a solution to perform real-time measures and integrates that system in a measure system based on a NIR sensor
  • Clock synchronization of a broadband seismometer through IEEE-1588 protocol 

    Pallares, Oriol; Río Fernandez, Joaquín del; Shariat Panahi, Shahram (2010-12-01)
    Article
    Open Access
    In seismology, the time of the signal acquisition is highly important in order to know the magnitude and location of the earthquake. This paper presents the tests carried out to synchronize the seismometer clock through ...
  • Contention-aware performance monitoring counter support for real-time MPSoCs 

    Jalle Ibarra, Javier; Fernández, Mikel; Abella, Jaume; Andersson, Jan; Patte, Mathieu; Fossati, Luca; Zulianello, Marco; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Conference lecture
    Open Access
    Tasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, complicating task timing analysis and deriving execution time bounds. Understanding the Actual Contention Delay (ACD) each task ...
  • Deconstructing bus access control policies for real-time multicores 

    Jalle Ibarra, Javier; Abella Ferrer, Jaume; Quiñones, Eduardo; Fossati, Luca; Zulianello, Marco; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2013)
    Conference report
    Restricted access - publisher's policy
    Multicores may satisfy the growing performance requirements of critical Real-Time systems which has made industry to consider them for future real-time systems. In a multicore, the bus contention-control policy plays a key ...
  • Desarollo de sistemas embedded basados en Linux para aplicaciones radio streaming 

    Fernández Escuín, Carlos (Universitat Politècnica de Catalunya, 2009-09)
    Master thesis (pre-Bologna period)
    Open Access
  • Design and Development of a Linux-based Operating User System for CubeSat On-Board Computers 

    Montsech Bravo, Isaac (Universitat Politècnica de Catalunya, 2019-06)
    Bachelor thesis
    60 months embargo
    The purpose of this work is to develop and test a Linux-based embedded software system for a nanosatellite. The main objective will be the development of a set of configuration files to use within a build system, which ...
  • Design of a dedicated cape board for an embedded system lab course using beaglebone 

    Pérez López, Raúl (Universitat Politècnica de Catalunya, 2014-05)
    Master thesis
    Open Access
    [ANGLÈS] This memory describes the design of an embedded system programming lab course for electronics engineering using BeagleBone board and a dedicated expansion board.
  • Design of a test system for embedded processor boards 

    Alonso Barbero, Carlos (Universitat Politècnica de Catalunya, 2018-06-21)
    Master thesis
    Open Access
    One of the most important part during the manufacturing process of an embedded system board is the final test. This process will guarantee that each of its parts that theboard contains works correctly and ensure the embedded ...
  • Development and evaluation of a low-cost infrared thermal camera for industrial predictive maintenance applications 

    Xhafa, Alda (Universitat Politècnica de Catalunya, 2017-06)
    Master thesis
    24 months embargo
    Covenantee:  Universitat Oberta de Catalunya
  • Diseño de interfaz entre una placa Beaglebone y periféricos mediante el bus GPMC 

    Suárez Vicente, Eugenia (Universitat Politècnica de Catalunya, 2016-05-31)
    Master thesis
    Open Access
    Desarrallo de una interfaz funcional entre un periférico de memoria externa y una Beaglebone mediante: Diseño hardware, para el elemento periférico y programación del driver GPMC, en el lado de la CPU para activar protocolos ...
  • Diseño del software de debug de un sistema telemático de automoción 

    Liébana Leirós, Julio (Universitat Politècnica de Catalunya, 2016-01)
    Bachelor thesis
    Restricted access - confidentiality agreement