Now showing items 1-20 of 44

    • 5GHz CMOS all–pass filter–based true time delay cell 

      Aghazadeh Dafsari, Seyed Rasoul; Martínez García, Herminio; Saberkari, Alireza (2018-12-22)
      Article
      Open Access
      Analog CMOS time-delay cells realized by passive components, e.g., lumped LC delay lines, are inefficient in terms of area for multi-GHz frequencies. All-pass filters considered as active circuits can, therefore, be the ...
    • AER communication for spiking neural network emulation on a microprocessor 

      Ballesteros Pujol, Roc (Universitat Politècnica de Catalunya, 2023-10-17)
      Bachelor thesis
      Open Access
      En aquest treball s'estudia un sistema de comunicació basat en el protocol AER (Address event representation) per a una xarxa neuronal del tipus spiking. Per fer-ho, en aquest projecte es dissenyen, utilitzant VHDL, les ...
    • AER-RT: Interfaz de Red con Topología en Anillo para SNN Multi-FPGA 

      Dorta Pérez, Silvestre Taho (Universitat Politècnica de Catalunya, 2013-07-08)
      Master thesis
      Open Access
      [ANGLÈS] This thesis presents AER-RT network interface, a network interface designed to work together a Multiprocessor System (MPS) and create an efficient and scalable multi-chip SNN network. The objective of AER-RT is ...
    • Aplicaciones didácticas de PLD/FPGA para las asignaturas de sistemas digitales 

      González Rodríguez, Jonatan (Universitat Politècnica de Catalunya, 2012-03-07)
      Bachelor thesis
      Open Access
      Este proyecto es una guía destinada a los futuros alumnos de la asignatura CSD que se imparte en el grado en Ingeniería de Sistemas de Telecomunicaciones en la EETAC y para personas que se inicien en el lenguaje de ...
    • Aplicacions de CSI-2 Frame Grabber per retrovisors d’automoció utilitzant Raspberry Pi 

      Blasco Coll, Roser (Universitat Politècnica de Catalunya, 2020-06)
      Bachelor thesis
      Restricted access - confidentiality agreement
    • Characterization of the substrate noise spectrum for mixed-signal ICs 

      Méndez Villegas, Miguel Ángel; Mateo Peña, Diego; Rubio Sola, Jose Antonio; González Jiménez, José Luis (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Conference report
      Open Access
      This paper presents a simplified analytical model of the substrate noise generated by digital circuitry that captures the most relevant frequency domain characteristics and relates them with parameters of the digital circuit ...
    • Control electronics for Chemical sensors 

      Grau De La Mano, Joan (Universitat Politècnica de Catalunya, 2021-01-24)
      Bachelor thesis
      Open Access
      his project consists in the creation of a digital control for a chemical sensor in charge of reading the temperature and keeping it close to a specific temperature (threshold temperature). To keep aspecific value of the ...
    • Desarrollo de una aplicación docente con la placa PYNQ-Z2 

      Fusté Varias, Carlos (Universitat Politècnica de Catalunya, 2022-07-07)
      Bachelor thesis
      Restricted access - confidentiality agreement
      This final degree thesis consists of developing a digital communications system based on frames between a PC and a PYNQ-Z2 FPGA board. Also, a MATLAB user interface is designed and implemented, and it is used as a ...
    • Desenvolupament del firmware d'una targeta de "Pulse Time Stamping" amb comunicació PCI express 

      Romaguera i Restudis, Josep-Oriol (Universitat Politècnica de Catalunya, 2012-01-13)
      Master thesis (pre-Bologna period)
      Restricted access - author's decision
      English: this final project has been developed in an ambitious project made by Signadyne, a spin-off of Institut de Ciències Fotòniques (ICFO). This project is enshrined in the modular instrumentation systems and software ...
    • Design and Implementation of Instruction Fusion Techniques in a RISC-V Out-Of-Order core 

      Riatti, Chiara (Universitat Politècnica de Catalunya, 2024-09-12)
      Bachelor thesis
      Open Access
      Covenantee:   Barcelona Supercomputing Center
      This thesis explores the design and implementation of instruction fusion techniques in a RISC-V Out-of-Order core. Instruction fusion is a microarchitectural technique that aims at optimising performance by merging multiple ...
    • Design, fabrication, characterization and reliability study of CMOS-MEMS Lorentz-force magnetometers 

      Valle Fraga, Juan José; Sánchez Chiva, José María; Fernández, Daniel; Madrenas Boadas, Jordi (2022-09-16)
      Article
      Open Access
      This article presents several design techniques to fabricate micro-electro-mechanical systems (MEMS) using standard complementary metal-oxide semiconductor (CMOS) processes. They were applied to fabricate high yield CMOS-MEMS ...
    • Design, Implementation and Measurements of a High-Speed Link using Aurora Protocol 

      Gargallo I Franco, Mireia (Universitat Politècnica de Catalunya, 2022-07-08)
      Bachelor thesis
      Restricted access - confidentiality agreement
      Covenantee:   Imasenic Advanced Imaging
      As communication rates continue to increase, data is being moved within systems at ever higher speeds. In the past 15 years, the industry has seen interconnection speeds increase from 1 Gbps to over 50 Gbps. The challenge ...
    • Development of a 15W dual automotive wireless charger 

      Centeno Arjona, Joan (Universitat Politècnica de Catalunya, 2020-01)
      Bachelor thesis
      Restricted access - author's decision
      The purpose of this thesis is to show the design of an automotive system from a hardware engineer trainee point of view, developed in a technological company. The system designed is a dual on-board wireless charger for ...
    • Didactic platform with a DSP to support the teaching of digital signal processing 

      Tatar Duma, Andrei Alexandru (Universitat Politècnica de Catalunya, 2022-06-23)
      Bachelor thesis
      Open Access
      Si ens posem en context d'un estudiant d'enginyeria, descobrirem que una de les majors motivacions de l'aprenentatge són les pràctiques de laboratori. Aquest treball de fi de grau tractarà sobre la recerca i el desenvolupament ...
    • Diseño de un bloque digital de activación para la aceleración de redes neuronales 

      Galeano Pérez, Diego (Universitat Politècnica de Catalunya, 2023-07-03)
      Bachelor thesis
      Open Access
      Avui dia és molt comú l'ús de xarxes neuronals per a diverses tasques. Aquestes grans xarxes estan formades per la concatenació de milions de neurones artificials, uns elements que recullen la informació que li arriba ...
    • Diseño e implementación de control digital en el convertidor DC/DC de 500 WCRS-500-6464 

      Hernández Gonzalo, Juan Carlos (Universitat Politècnica de Catalunya, 2021-01)
      Bachelor thesis
      Restricted access - confidentiality agreement
    • Diseño e implementación de un sistema de captura de video sobre lógica configurable 

      Sanz Moreno, Danilo (Universitat Politècnica de Catalunya, 2016)
      Master thesis (pre-Bologna period)
      Restricted access - author's decision
    • Dispositivo electrónico de apertura de puertas 

      Sebastián Román, Joel (Universitat Politècnica de Catalunya, 2024-07-09)
      Bachelor thesis
      Open Access
      El proyecto se ha centrado en el diseño y desarrollo de un mecanismo que, acoplado a una cerradura ordinaria con su llave introducida, permite abrir, cerrar y echar el cerrojo de forma remota o presencial, sin necesidad ...
    • Disseny d'una interfície de fibra òptica per la dSpace 

      Badia Tena, Pol (Universitat Politècnica de Catalunya, 2024-07-12)
      Bachelor thesis
      Open Access
      Aquest document és la memòria del treball final de grau. L’objectiu principal consisteix en el disseny d’una interfície de les fibres òptiques. En aquest projecte, es parteix d’una primera versió, la qual s’actualitza per ...
    • Disseny i implementació d'un sistema d'adquisició de dades fisiològiques per a activitats esportives. Part Hardware 

      Montalbán Fuster, Àlex (Universitat Politècnica de Catalunya, 2018-07)
      Bachelor thesis
      Restricted access - author's decision
      Elite athletes take part in races or trainings that are very long; they can last up to days. It is very important to have all the data always controlled because by studying it, it can improve the performance of the athlete, ...