Now showing items 1-7 of 7

    • Distributing the frontend for temperature reduction 

      Chaparro, Pedro; Magklis, Grigorios; González González, José; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Conference report
      Open Access
      Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the heat generated, and the performance impact ...
    • High-Performance low-vcc in-order core 

      Abella Ferrer, Jaume; Chaparro, Pedro; Vera Rivera, Francisco Javier; Carretero Casado, Javier; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2010)
      Conference report
      Open Access
      Power density grows in new technology nodes, thus requiring Vcc to scale especially in mobile platforms where energy is critical. This paper presents a novel approach to decrease Vcc while keeping operating frequency high. ...
    • Implementing end-to-end register data-flow continuous self-test 

      Carretero Casado, Javier Sebastián; Chaparro, Pedro; Vera Rivera, Francisco Javier; Abella Ferrer, Jaume; González Colás, Antonio María (2011-08-01)
      Article
      Restricted access - publisher's policy
      While Moore's Law predicts the ability of semiconductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in that law. One concern is the verification effort ...
    • On-line failure detection and confinement in caches 

      Abella Ferrer, Jaume; Chaparro, Pedro; Vera Rivera, Francisco Javier; Carretero Casado, Javier Sebastián; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2008)
      Conference report
      Open Access
      Technology scaling leads to burn-in phase out and increasing post-silicon test complexity, which increases in-the-field error rate due to both latent defects and actual errors. As a consequence, there is an increasing need ...
    • Thermal-aware clustered microarchitectures 

      Chaparro, Pedro; González González, José; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2004)
      Conference report
      Open Access
      As frequencies and feature size scale faster than operating voltages, power density is increasing in each processor generation. Power density and the cost of removing the heat it generates are increasing at the same rate. ...
    • Understanding the thermal implications of multicore architectures 

      Chaparro, Pedro; González González, José; Magklis, Grigorios; Cai, Qiong; González Colás, Antonio María (2007-08)
      Article
      Open Access
      Multicore architectures are becoming the main design paradigm for current and future processors. The main reason is that multicore designs provide an effective way of overcoming instruction-level parallelism (ILP) limitations ...
    • Using MCD-DVS for dynamic thermal management performance improvement 

      Chaparro, Pedro; Magklis, Grigorios; González González, José; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2006)
      Conference report
      Open Access
      With chip temperature being a major hurdle in microprocessor design, techniques to recover the performance loss due to thermal emergency mechanisms are crucial in order to sustain performance growth. Many techniques for ...