Now showing items 1-20 of 39

  • Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems 

    Palomo, Xavier; Mezzetti, Enrico; Abella, Jaume; Bril, Reinder J.; Cazorla, Francisco J. (IEEE, 2019-06-24)
    Conference lecture
    Open Access
    Commercially available Off The Shelf (COTS) multicores have been assessed as the baseline computing platform even in the most conservative real-time domains. Multicore contention arising on shared hardware resources, with ...
  • Adapting TDMA arbitration for measurement-based probabilistic timing analysis 

    Panic, Milos; Abella, Jaume; Quiñones, Eduardo; Hernandez, Carles; Ungerer, Theo; Cazorla, Francisco J. (Elsevier, 2017-07)
    Article
    Open Access
    Critical Real-Time Embedded Systems require functional and timing validation to prove that they will perform their functionalities correctly and in time. For timing validation, a bound to the Worst-Case Execution Time ...
  • Aging Assessment and Design Enhancement of Randomized Cache Memories 

    Trilla, David; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-01-17)
    Article
    Open Access
    Critical real-time systems require the estimation of the worst-case execution time (WCET) for scheduling purposes and resource budgeting. Measurement-based probabilistic timing analysis (MBPTA) has been shown recently as ...
  • Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines 

    Tabani, Hamid; Kosmidis, Leonidas; Abella, Jaume; Cazorla, Francisco J.; Bernat, Guillem (Association for Computing Machinery (ACM), 2019-06-06)
    Conference lecture
    Open Access
    The complexity and size of Autonomous Driving (AD) software are comparably higher than that of software implementing other (standard) functionalities in the car. To make things worse, a big fraction of AD software is not ...
  • AURIX TC277 Multicore Contention Model Integration for Automotive Applications 

    Mezzetti, Enrico; Barbina, Luca; Abella, Jaume; Botta, Stefania; Cazorla, Francisco J. (IEEE, 2019-05-16)
    Conference lecture
    Open Access
    The ability to produce early guaranteed performance (worst-case execution time) estimates for multicores, i.e. before software from different providers gets integrated onto the same critical system, is pivotal. This helps ...
  • Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis 

    Slijepcevic, Mladen; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2017-09-28)
    Conference lecture
    Open Access
    Wormhole-based NoCs (wNoCs) are widely accepted in high-performance domains as the most appropriate solution to interconnect an increasing number of cores in the chip. However, wNoCs suitability in the context of critical ...
  • Cache side-channel attacks and time-predictability in high-performance critical real-time systems 

    Trilla, David; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (Association for Computing Machinery (ACM), 2018-06-24)
    Conference lecture
    Open Access
    Embedded computers control an increasing number of systems directly interacting with humans, while also manage more and more personal or sensitive information. As a result, both safety and security are becoming ubiquitous ...
  • Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration 

    Fernandez, Gabriel; Jalle, Javier; Abella, Jaume; Quiñones, Eduardo; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2016-10-11)
    Article
    Open Access
    Numerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which ...
  • Design and implementation of a fair credit-based bandwidth sharing scheme for buses 

    Slijepcevic, Mladen; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-05-15)
    Conference lecture
    Open Access
    Fair arbitration in the access to hardware shared resources is fundamental to obtain low worst-case execution time (WCET) estimates in the context of critical real-time systems, for which performance guarantees are essential. ...
  • Dynamic software randomisation: Lessons learnec from an aerospace case study 

    Cros, Fabrice; Kosmidis, Leonidas; Wartel, Franck; Morales, David; Abella, Jaume; Broster, Ian; Cazorla, Francisco J. (2017-05-15)
    Conference lecture
    Open Access
    Timing Validation and Verification (V&V) is an important step in real-time system design, in which a system's timing behaviour is assessed via Worst Case Execution Time (WCET) estimation and scheduling analysis. For WCET ...
  • ePAPI: Performance Application ProgrammingInterface for Embedded Platforms 

    Giesen, Jeremy; Mezzetti, Enrico; Abella, Jaume; Fernández, Enrique; Cazorla, Francisco J. (2019)
    Conference lecture
    Open Access
    Performance Monitoring Counters (PMCs) have been traditionally used in the mainstream computing domain to perform debugging and optimization of software performance. PMCs are increasingly considered in embedded time-critical ...
  • EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application 

    Mezzetti, Enrico; Fernandez, Mikel; Bardizbanyan, Alen; Agirre, Irune; Abella, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-06-08)
    Conference lecture
    Open Access
    Measurement-based timing analysis approaches are increasingly making their way into several industrial domains on account of their good cost-benefit ratio. The trustworthiness of those methods, however, suffers from the ...
  • EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis 

    Ziccardi, Marco; Mezzetti, Enrico; Vardanega, Tullio; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2016-01-18)
    Conference lecture
    Open Access
    Measurement-based probabilistic timing analysis (MBPTA) computes trustworthy upper bounds to the execution time of software programs. MBPTA has the connotation, typical of measurement-based techniques, that the bounds ...
  • Execution time distributions in embedded safety-critical systems using extreme value theory 

    del Castillo, Joan; Padilla, Maria; Abella, Jaume; Cazorla, Francisco J. (Inderscience, 2017)
    Article
    Open Access
    Several techniques have been proposed to upper-bound the worst-case execution time behaviour of programs in the domain of critical real-time embedded systems. These computing systems have strong requirements regarding the ...
  • Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262 

    Agirre, Irune; Cazorla, Francisco J.; Abella, Jaume; Hernandez, Carles; Mezzetti, Enrico; Azkarate-askasua, Mikel; Vardanega, Tullio (IEEE, 2018-09-01)
    Open Access
    Car manufacturers relentlessly replace or augment the functionality of mechanical subsystems with electronic components. Most such subsystems (e.g., steer-by-wire) are safety related, hence, subject to regulation. ISO-26262, ...
  • Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier 

    Pujol, Roger; Tabani, Hamid; Kosmidis, Leonidas; Mezzetti, Enrico; Abella, Jaume; Cazorla, Francisco J. (2019)
    Conference lecture
    Open Access
    Deep learning-based solutions and, in particular, deep neural networks (DNNs) are at the heart of several functionalities in critical-real time embedded systems (CRTES) from vision-based perception (object detection and ...
  • High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V 

    Mezzetti, Enrico; Kosmidis, Leonidas; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2018-01-16)
    Article
    Open Access
    As software continues to control more system-critical functions in cars, its timing is becoming an integral element in functional safety. Timing validation and verification (V&V) assesses softwares end-to-end timing ...
  • Increasing the Reliability of Software Timing Analysis for Cache-Based Processors 

    Milutinovic, Suzana; Mezzetti, Enrico; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2019-06-01)
    Article
    Open Access
    Real-time systems are witnessing a significant increase in critical software's size, complexity, and performance needs, which can only be satisfied with high-performance hardware features. Cache memories, pervasively used ...
  • Industrial experiences with resource management under software randomization in ARINC653 avionics environments 

    Kosmidis, Leonidas; Maxim, Cristian; Jegu, Victor; Vatrinet, Francis; Cazorla, Francisco J. (Association for Computing Machinery (ACM), 2018-11-05)
    Conference lecture
    Open Access
    Injecting randomization in different layers of the computing platform has been shown beneficial for security, resilience to software bugs and timing analysis. In this paper, with focus on the latter, we show our experience ...
  • LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache 

    Benedicte, Pedro; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J. (IEEE, 2019-05-16)
    Conference lecture
    Open Access
    As implementation technology shrinks, the presence of errors in cache memories is becoming an increasing issue in all computing domains. Critical systems, e.g. space and automotive, are specially exposed and susceptible ...