• Accelerating software memory compression on the Cell/B.E. 

    Beltran Querol, Vicenç; Martorell Bofill, Xavier; Torres Viñals, Jordi; Ayguadé Parra, Eduard (2008)
    Texto en actas de congreso
    Acceso restringido por política de la editorial
    The idea of transparently compressing and decompressing the content of main memory to virtually enlarge their capacity has been previously proposed and studied in the literature. The rationale behind this idea lies in the ...
  • A CellBE-based HPC application for the analysis of vulnerabilities in cryptographic hash functions 

    Cilardo, Alessandro; Esposito, Luigi; Veniero, Antonio; Mazzeo, Antonino; Beltran Querol, Vicenç; Ayguadé Parra, Eduard (2010)
    Texto en actas de congreso
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    After some recent breaks presented in the technical literature, it has become of paramount importance to gain a deeper understanding of the robustness and weaknesses of cryptographic hash functions. In particular, in the ...
  • Achieving high memory performance from heterogeneous architectures with the SARC programming model 

    Ferrer, Roger; Beltran Querol, Vicenç; González Tallada, Marc; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (ACM, 2009)
    Comunicación de congreso
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    Current heterogeneous multicore architectures, including the Cell/B.E., GPUs, and future developments, like Larrabee, require enormous programming efforts to efficiently run current parallel applications, achieving high ...
  • Adaptive and architecture-independent task granularity for recursive applications 

    Navarro, Antoni; Mateo, Sergi; Perez, Jose M.; Beltran Querol, Vicenç; Ayguadé Parra, Eduard (Springer, 2017)
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    In the last few decades, modern applications have become larger and more complex. Among the users of these applications, the need to simplify the process of identifying units of work increased as well. With the approach ...
  • A directive-based approach to perform persistent checkpoint/restart 

    Maroñas, Marcos; Mateo, Sergi; Beltran Querol, Vicenç; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2017)
    Texto en actas de congreso
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    Exascale platforms require support for resilience capabilities due to increasing numbers of components and associated error rates. In this paper, we present a new directive-based approach to perform application-level ...
  • A hybrid web server architecture for secure e-business web applications 

    Beltran Querol, Vicenç; Carrera Pérez, David; Guitart Fernández, Jordi; Torres Viñals, Jordi; Ayguadé Parra, Eduard (2005-09)
    Artículo
    Acceso restringido por política de la editorial
    Nowadays the success of many e-commerce applications, such as on-line banking, depends on their reliability, robustness and security. Designing a web server architecture that keeps these properties under high loads is a ...
  • A Linux kernel scheduler extension for multi-core systems 

    Roca, Aleix; Beltran Querol, Vicenç; Marquet, Kevin (Barcelona Supercomputing Center, 2018-04-24)
    Texto en actas de congreso
    Acceso abierto
    Current runtime systems take care of getting the mostofeachsystemcorebydistributingworkamongthemultiple CPUs of a machine but they are not aware of when one of their threads (workers) perform blocking calls (e.g. I/O ...
  • Assembling a high-productivity DSL for computational fluid dynamics 

    Macià, Sandra; Martínez-Ferrer, Pedro J.; Mateo, Sergi; Beltran Querol, Vicenç; Ayguadé Parra, Eduard (Association for Computing Machinery (ACM), 2019)
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    As we move towards exascale computing, an abstraction for effective parallel computation is increasingly needed to overcome the maintainability and portability of scientific applications while ensuring the efficient and ...
  • A unified memory approach to GPU acceleration on task based programming models 

    Rodriguez, Aimar; Beltran Querol, Vicenç (Barcelona Supercomputing Center, 2018-04-24)
    Texto en actas de congreso
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  • BSC contributions in energy-aware resource management for large scale distributed systems 

    Valero Cortés, Mateo; Torres Viñals, Jordi; Ayguadé Parra, Eduard; Carrera Pérez, David; Guitart Fernández, Jordi; Beltran Querol, Vicenç; Becerra Fontal, Yolanda; Badia Sala, Rosa Maria; Labarta Mancho, Jesús José (2010)
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    This paper introduces the work being carried out at Barcelona Supercomputing Center in the area of Green Computing. We have been working in resource management for a long time and recently we included the energy parameter ...
  • CellMT: A cooperative multithreading library for the Cell/B.E. 

    Beltran Querol, Vicenç; Carrera Pérez, David; Torres Viñals, Jordi; Ayguadé Parra, Eduard (IEEE Computer Society Publications, 2009-12-16)
    Texto en actas de congreso
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    The Cell BE processor has proved that heterogeneous multi-core systems can provide a huge computational power with high efficiency for a wide range of applications. The simple design of the computational units and the use ...
  • Efficient Scalable Computing through Flexible Applications and Adaptive Workloads 

    Iserte, Sergio; Mayo, Rafael; Quintana-Ortí, Enrique S.; Beltran Querol, Vicenç; Peña, Antonio J. (IEEE, 2017-09-07)
    Comunicación de congreso
    Acceso abierto
    In this paper we introduce a methodology for dynamic job reconfiguration driven by the programming model runtime in collaboration with the global resource manager. We improve the system throughput by exploiting malleability ...
  • Enhancing scheduling through monitoring and prediction techniques 

    Navarro Muñoz, Antoni; Beltran Querol, Vicenç; Ayguadé Parra, Eduard (Barcelona Supercomputing Center, 2019-05-07)
    Texto en actas de congreso
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  • Improving the integration of task nesting and dependencies in OpenMP 

    Pérez, Josep M.; Beltran Querol, Vicenç; Labarta, Jesús; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2017)
    Texto en actas de congreso
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    The tasking model of OpenMP 4.0 supports both nesting and the definition of dependences between sibling tasks. A natural way to parallelize many codes with tasks is to first taskify the high-level functions and then to ...
  • Improving the interoperability between MPI and task-based programming models 

    Sala, Kevin; Bellón, Jorge; Farré, Pau; Teruel, Xavier; Pérez, Josep M.; Peña, Antonio J.; Holmes, Daniel; Beltran Querol, Vicenç; Labarta Mancho, Jesús José (Association for Computing Machinery (ACM), 2018)
    Texto en actas de congreso
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    In this paper we propose an API to pause and resume task execution depending on external events. We leverage this generic API to improve the interoperability between MPI synchronous communication primitives and tasks. When ...
  • Improving web server efficiency on commodity hardware 

    Beltran Querol, Vicenç (Universitat Politècnica de Catalunya, 2008-10-03)
    Tesis
    Acceso abierto
    El ràpid creixement de la Web requereix una gran quantitat de recursos computacionals que han de ser utilitzats eficientment. Avui en dia, els servidors basats en hardware estendard son les plataformes preferides per ...
  • Improving web server performance through main memory compression 

    Beltran Querol, Vicenç; Torres Viñals, Jordi; Ayguadé Parra, Eduard (IEEE Computer Society, 2008)
    Comunicación de congreso
    Acceso abierto
    Current web servers are highly multithreaded applications whose scalability benefits from the current multicore/multiprocessor trend. However, some workloads can not capitalize on this because their performance is limited by ...
  • Introducing the Task-Aware Storage I/O (TASIO) Library 

    Roca Nonell, Aleix; Beltran Querol, Vicenç; Mateo Bellido, Sergi (Springer, 2019-08-09)
    Capítulo de libro
    Acceso abierto
    Task-based programming models are excellent tools to parallelize and seamlessly load balance an application workload. However, the integration of I/O intensive applications and task-based programming models is lacking. ...
  • Leveraging OmpSs to exploit hardware accelerators 

    Sainz, Florentino; Mateo Bellido, Sergi; Beltran Querol, Vicenç; Bosque, José L.; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Texto en actas de congreso
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    CUDA and OpenCL are the most widely used programming models to exploit hardware accelerators. Both programming models provide a C-based programming language to write accelerator kernels and a host API used to glue the host ...
  • On the adequacy of lightweight thread approaches for high-level parallel programming models 

    Castelló, Adrián; Mayo, Rafael; Sala, Kevin; Beltran Querol, Vicenç; Balaji, Pavan; Peña, Antonio J. (Elsevier, 2018-07)
    Artículo
    Acceso restringido por política de la editorial
    High-level parallel programming models (PMs) are becoming crucial in order to extract the computational power of current on-node multi-threaded parallelism. The most popular PMs, such as OpenMP or OmpSs, are directive-based: ...