Browsing by Subject "Arquitectura d'ordinadors"
Now showing items 1-20 of 244
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2018 International Symposium on Computer Architecture influential paper award
(2018-07-01)
Article
Open AccessThe International Symposium on Computer Architecture (ISCA) recognizes every year the most influential paper published in this conference 15 years earlier, based on its impact on research, development, products or ideas. ... -
A control and management architecture supporting autonomic NFV services
(2019-02)
Article
Open AccessThe proposed control, orchestration and management (COM) architecture is presented from a high-level point of view; it enables the dynamic provisioning of services such as network data connectivity or generic network slicing ... -
A hardware accelerator for ORB-SLAM
(Universitat Politècnica de Catalunya, 2019-10-17)
Master thesis
Open AccessSimultaneous Localization And Mapping (SLAM) is a key component of self-driving cars. We study ORB-SLAM, a SLAM state-of-the-art solution, and develop a hardware accelerator for a critical part of it: ORB feature extraction. ... -
A hybrid web server architecture for secure e-business web applications
(2005-09)
Article
Restricted access - publisher's policyNowadays the success of many e-commerce applications, such as on-line banking, depends on their reliability, robustness and security. Designing a web server architecture that keeps these properties under high loads is a ... -
A Multi-core processor for hard real-time systems
(Universitat Politècnica de Catalunya, 2011-11-04)
Doctoral thesis
Open AccessThe increasing demand for new functionalities in current and future hard real-time embedded systems, like the ones deployed in automotive and avionics industries, is driving an increment in the performance required in ... -
A self-adaptive hardware architecture with fault tolerance capabilities
(2013-12-09)
Article
Restricted access - publisher's policyThis paper describes a Fault Tolerance System (FTS) implemented in a new self-adaptive hardware architecture. This architecture is based on an array of cells that implements in a distributed way self-adaptive capabilities. ... -
A Tensor Marshaling Unit for sparse tensor algebra on general-purpose processors
(Association for Computing Machinery (ACM), 2023)
Conference report
Open AccessThis paper proposes the Tensor Marshaling Unit (TMU), a near-core programmable dataflow engine for multicore architectures that accelerates tensor traversals and merging, the most critical op-erations of sparse tensor ... -
A two-dimensional architecture for end-to-end resource management in virtual network environments
(2012-09)
Article
Restricted access - publisher's policyIn recent years, various network virtualization techniques have been proposed for flexibly supporting heterogeneous services over virtual network platforms. However, systematic views on how virtual network resources (VNRs) ... -
Adaptación a un entorno J2EE desde un sistema centralizado Host
(Universitat Politècnica de Catalunya, 2013-12-20)
Master thesis (pre-Bologna period)
Restricted access - author's decisionExplain J2EE adaptation process, advantages, functional design, etc. -
Adaptive fault-tolerant architecture for unreliable device technologies
(CRC Press, Taylor and Francis Group, 2013-06-03)
Part of book or chapter of book
Restricted access - publisher's policyNanoelectronic Device Applications Handbook gives a comprehensive snapshot of the state of the art in nanodevices for nanoelectronics applications. Combining breadth and depth, the book includes 68 chapters on topics that ... -
Adaptive memory hierarchies for next generation tiled microarchitectures
(Universitat Politècnica de Catalunya, 2011-07-05)
Doctoral thesis
Open AccessLes últimes dècades el rendiment dels processadors i de les memòries ha millorat a diferent ritme, limitant el rendiment dels processadors i creant el conegut memory gap. Sol·lucionar aquesta diferència de rendiment és un ... -
Admission control for multi-tenant radio access networks
(2017)
Conference report
Restricted access - publisher's policyThe sharing of Radio Access Networks is gaining momentum in small cell scenarios, due to the associated reduction in capital and operational costs. In this scenario, the split of radio resources among tenants sharing the ... -
Algoritmos de ordenación conscientes de la arquitectura y las características de los datos
(Universitat Politècnica de Catalunya, 2004-07-02)
Doctoral thesis
Open AccessEn esta tesis analizamos y presentamos algoritmos de ordenación secuencial y paralelo que explotan la jerarquía de memoria del computador usado y/o reducen la comunicación de los datos. Sin embargo, aunque los objetivos ... -
An abstraction methodology for the evaluation of multi-core multi-threaded architectures
(IEEE Computer Society Publications, 2011)
Conference report
Restricted access - publisher's policyAs the evolution of multi-core multi-threaded processors continues, the complexity demanded to perform an extensive trade-off analysis, increases proportionally. Cycle-accurate or trace-driven simulators are too slow to ... -
An Approach to a Fault Tolerance LISP Architecture
(Springer Verlag, 2011)
Conference report
Open AccessNext Generation Internet points out the challenge of addressing "things" on both a network with (wired) and without (wireless) infrastructure. In this scenario, new efficient and scalable addressing and routing schemes ... -
An approximate analysis of synchronous multiple bus
(1985)
Research report
Open AccessThis paper presents an approximate analytic model for evaluating the performance of a loosely coupled multiprocessor architecture whose memory, organized in modules, is shared by all the processors. Each memory module (Mi) ... -
An energy-efficient and scalable eDRAM-based register file architecture for GPGPU
(ACM, 2013)
Conference report
Restricted access - publisher's policyThe heavily-threaded data processing demands of streaming multiprocessors (SM) in a GPGPU require a large register file (RF). The fast increasing size of the RF makes the area cost and power consumption unaffordable for ... -
An on-line test strategy and analysis for a 1T1R crossbar memory
(Institute of Electrical and Electronics Engineers (IEEE), 2017)
Conference report
Open AccessMemristors are emerging devices known by their nonvolability, compatibility with CMOS processes and high density in circuits density in circuits mostly owing to the crossbar nanoarchitecture. One of their most notable ... -
Analysis and architectural support for parallel stateful packet processing
(Universitat Politècnica de Catalunya, 2008-07-09)
Doctoral thesis
Open AccessThe evolution of network services is closely related to the network technology trend. Originally network nodes forwarded packets from a source to a destination in the network by executing lightweight packet processing, or ... -
Analysis and mitigation of writeback cache lock-ups in Linux
(Universitat Politècnica de Catalunya, 2020-06)
Bachelor thesis
Open AccessLinux caches disk I/O for performance: writes complete immediately from userspace perspective, and are committed to storage later. But in the presence of heavy writers, this buffering can easily hurt system responsiveness ...
