Now showing items 1-5 of 5

    • EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application 

      Mezzetti, Enrico; Fernandez, Mikel; Bardizbanyan, Alen; Agirre, Irune; Abella Ferrer, Jaume; Vardanega, Tullio; Cazorla, Francisco J. (Institute of Electrical and Electronics Engineers (IEEE), 2017-06-08)
      Conference lecture
      Open Access
      Measurement-based timing analysis approaches are increasingly making their way into several industrial domains on account of their good cost-benefit ratio. The trustworthiness of those methods, however, suffers from the ...
    • Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262 

      Agirre, Irune; Cazorla, Francisco J.; Abella Ferrer, Jaume; Hernandez, Carles; Mezzetti, Enrico; Azkarate-askasua, Mikel; Vardanega, Tullio (IEEE, 2018-09-01)
      Open Access
      Car manufacturers relentlessly replace or augment the functionality of mechanical subsystems with electronic components. Most such subsystems (e.g., steer-by-wire) are safety related, hence, subject to regulation. ISO-26262, ...
    • Multi-core devices for safety-critical systems: a survey 

      Perez Cerrolaza, Jon; Obermaisser, Roman; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier; Grüttner, Kim; Agirre, Irune; Ahmadian, Hamidreza; Allende, Imanol (Association for Computing Machinery (ACM), 2020-09)
      Article
      Open Access
      Multi-core devices are envisioned to support the development of next-generation safety-critical systems, enabling the on-chip integration of functions of different criticality. This integration provides multiple system-level ...
    • On the tailoring of CAST-32A certification guidance to real COTS multicore architectures 

      Agirre, Irune; Abella Ferrer, Jaume; Azkarate-Askasua, Mikel; Cazorla, Francisco J. (IEEE, 2018-03-12)
      Conference lecture
      Open Access
      The use of Commercial Off-The-Shelf (COTS) multicores in real-time industry is on the rise due to multicores' potential performance increase and energy reduction. Yet, the unpredictable impact on timing of contention in ...
    • Software Time Reliability in the Presence of Cache Memories 

      Milutinovic, Suzana; Abella Ferrer, Jaume; Agirre, Irune; Azkarate-Askasua, Mikel; Mezzetti, Enrico; Vardanega, Tullio; Cazorla, Francisco J. (Springer International Publishing, 2017-05-30)
      Conference lecture
      Open Access
      The use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. In the presence of caches, the worst-case timing behavior of a system heavily depends on how code and data are laid out ...