Now showing items 1-6 of 6

    • Aggressive undervolting of FPGAs : power & reliability trade-offs 

      Salami, Behzad (Universitat Politècnica de Catalunya, 2018-11-19)
      Doctoral thesis
      Open Access
      In this work, we evaluate aggressive undervolting, i.e., voltage underscaling below the nominal level to reduce the energy consumption of Field Programmable Gate Arrays (FPGAs). Usually, voltage guardbands are added by ...
    • An extensive study on iterative solver resilience : characterization, detection and prediction 

      Mutlu, Burcu O. (Universitat Politècnica de Catalunya, 2019-11-12)
      Doctoral thesis
      Open Access
      Soft errors caused by transient bit flips have the potential to significantly impactan applicalion's behavior. This has motivated the design of an array of techniques to detect, isolate, and correct soft errors using ...
    • Improving the performance and energy-efficiency of virtual memory 

      Karakostas, Vasileios (Universitat Politècnica de Catalunya, 2016-04-18)
      Doctoral thesis
      Open Access
      Virtual memory improves programmer productivity, enhances process security, and increases memory utilization. However, virtual memory requires an address translation from the virtual to the physical address space on every ...
    • Multicore architecture prototyping on reconfigurable devices 

      Arcas Abella, Oriol (Universitat Politècnica de Catalunya, 2016-04-15)
      Doctoral thesis
      Open Access
      In the the last decades several performance walls were hit. The memory wall and the power wall are limiting the performance scaling of digital microprocessors. Homogeneous multicores rely on thread-level parallelism, which ...
    • A multicore emulator with a profiling infrastructure for transactional memory on FPGA 

      Sönmez, Nehir (Universitat Politècnica de Catalunya, 2012-09-19)
      Doctoral thesis
      Open Access
      This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memory environment on a multicore prototype that is realized on FPGA fabric. For this, we devise a MIPS-compatible shared-memory ...
    • Reliability for exascale computing : system modelling and error mitigation for task-parallel HPC applications 

      Subasi, Omer (Universitat Politècnica de Catalunya, 2016-10-27)
      Doctoral thesis
      Open Access
      As high performance computing (HPC) systems continue to grow, their fault rate increases. Applications running on these systems have to deal with rates on the order of hours or days. Furthermore, some studies for future ...