Exploració per tema "Vector architectures"

Ara es mostren els items 1-6 de 6

    • A RISC-V simulator and benchmark suite for designing and evaluating vector architectures 

      Ramírez Lazo, Cristóbal; Hernández, César Alejandro; Palomar Pérez, Óscar; Unsal, Osman Sabri; Ramírez Salinas, Marco Antonio; Cristal Kestelman, Adrián (2020-11)
      Article
      Accés obert
      Vector architectures lack tools for research. Consider the gem5 simulator, which is possibly the leading platform for computer-system architecture research. Unfortunately, gem5 does not have an available distribution that ...

    • Accelerating FFT using NEC SX-Aurora vector engine 

      Vizcaíno Serrano, Pablo; Mantovani, Filippo; Labarta Mancho, Jesús José (Springer, 2021)
      Text en actes de congrés
      Accés obert
      Novel architectures leveraging long and variable vector lengths like the NEC SX-Aurora or the vector extension of RISCV are appearing as promising solutions on the supercomputing market. These architectures often require ...

    • Adaptable register file organization for vector processors 

      Ramírez Lazo, Cristóbal; Reggiani, Enrico; Rojas Morales, Carlos; Figueras Bagué, Roger; Villa Vargas, Luis Alfonso; Ramírez Salinas, Marco Antonio; Valero Cortés, Mateo; Unsal, Osman Sabri; Cristal Kestelman, Adrián (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Text en actes de congrés
      Accés obert
      Contemporary Vector Processors (VPs) are de-signed either for short vector lengths, e.g., Fujitsu A64FX with 512-bit ARM SVE vector support, or long vectors, e.g., NEC Aurora Tsubasa with 16Kbits Maximum Vector Length ...

    • Efficient direct convolution using long SIMD instructions 

      Limas Santana, Alexandre de; Armejach Sanosa, Adrià; Casas, Marc (Association for Computing Machinery (ACM), 2023)
      Text en actes de congrés
      Accés obert
      This paper demonstrates that state-of-the-art proposals to compute convolutions on architectures with CPUs supporting SIMD instructions deliver poor performance for long SIMD lengths due to frequent cache conflict misses. ...

    • VALib and SimpleVector: Tools for rapid initial research on vector architectures 

      Stanic, Milan; Palomar Pérez, Óscar; Ratkovic, Ivan; Duric, Milovan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2014)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Vector architectures have been traditionally applied to the supercomputing domain with many successful incarnations. The energy efficiency and high performance of vector processors, as well as their applicability in other ...

    • Vector architectures for Exascale 

      Caminal Pallarés, Helena (Universitat Politècnica de Catalunya, 2017-07-03)
      Projecte Final de Màster Oficial
      Accés restringit per acord de confidencialitat