• A module-based cell processor simulator 

      Cabarcas Jaramillo, Felipe; Rico Carro, Alejandro; Rodenas, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC), 2006)
      Comunicació de congrés
      Accés obert
      An interesting design alternative to replication-based chip multiprocessors is to create heterogeneous chip multiprocessors composed of several different cores, with one or more of them running the operating system and ...
    • Castell: a heterogeneous cmp architecture scalable to hundreds of processors 

      Cabarcas Jaramillo, Felipe (Universitat Politècnica de Catalunya, 2011-09-19)
      Tesi
      Accés obert
      Technology improvements and power constrains have taken multicore architectures to dominate microprocessor designs over uniprocessors. At the same time, accelerator based architectures have shown that heterogeneous ...
    • CellSim: a validated modular heterogeneous multiprocessor simulator 

      Cabarcas Jaramillo, Felipe; Rico Carro, Alejandro; Ródenas Picó, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (Thomson Editores Spain, 2007)
      Text en actes de congrés
      Accés obert
      As the number of transistors on a chip continues increasing the power consumption has become the most important constraint in processors design. Therefore, to increase performance, computer architects have decided to use ...
    • Scalability of parallel video decoding on heterogeneous manycore architectures 

      Álvarez Mesa, Mauricio; Cabarcas Jaramillo, Felipe; Ramírez Bellido, Alejandro; Meenderinck, Cor; Juurlink, Ben; Valero Cortés, Mateo (2011)
      Report de recerca
      Accés obert
      This paper presents an analysis of the scalability of the parallel video decoding on heterogeneous many core architectures. As benchmark, we use a highly parallel H.264/AVC video decoder that generates a large number of ...