• Cross-layer system reliability assessment framework for hardware faults 

      Vallero, Alessandro; Savino, Alessandro; Politano, Gianfranco; Di Carlo, Stefano; Chatzidimitriou, Athanansios; Tselonis, Sotiris; Kaliorakis, Manolis; Gizipoulos, Dimitris; Riera Villanueva, Marc; Canal Corretger, Ramon; González Colás, Antonio María; Kooli, Maha; Bosio, Alberto; Di Natale, Giorgio (Institute of Electrical and Electronics Engineers (IEEE), 2016)
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      System reliability estimation during early design phases facilitates informed decisions for the integration of effective protection mechanisms against different classes of hardware faults. When not all system abstraction ...
    • ETS 2022 Foreword 

      Manich Bou, Salvador; Rodríguez, Rosa; Mir, Salvador; Bernardi, Paolo; Tille, Daniel; Bosio, Alberto (2022-05)
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    • ETS 2022 ORGANIZING COMMITTEE 

      Manich Bou, Salvador; Rodríguez Montañés, Rosa; Bernardi, Paolo; Tille, Daniel; Mir, Salvador; Bosio, Alberto; Arumi Delgado, Daniel; Gómez Pau, Álvaro; Cassano, Luca; Jiao, Hailong; Miclea, Liviu; Sanchez, Ernesto; Savino, Alessandro; Canal Corretger, Ramon; Eggersglüß, Stephan; Fransi, Sergi; Taouil, Mottaqiallah; Calomarde Palomino, Antonio; Weiner, Michael; Michael, Maria K.; Sonza Reorda, Matteo; Larsson, Erik; Vatajelu, Elena-Ioana; Stratigopoulos, Haralampos-G.; Parisi Baradad, Vicenç; Jiao, Hailong; Huang, Junlin; Li, Huawei; Chillarige, Sameer; Kameyama, Shuichi; Carro, Luigi; Su, Fei; Nicolici, Nicola; Huang, Shi-Yu (2022-05)
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    • SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems 

      Vallero, Alessandro; Savino, Alessandro; Chatzidimitriou, Athanansios; Kaliorakis, Manolis; Kooli, Maha; Riera Villanueva, Marc; Di Natale, Giorgio; Bosio, Alberto; Canal Corretger, Ramon; Gizopoulos, Dimitris; Di Carlo, Stefano; Anglada Sanchez , Martí; González Colás, Antonio María; Mariani, R. (Institute of Electrical and Electronics Engineers (IEEE), 2018-01-01)
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      Cross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different ...