Browsing by Author "Lira Rueda, Javier"
Lira Rueda, Javier (Universitat Politècnica de Catalunya, 2011-11-25)
Open AccessResearchers from both academia and industry agree that future CMPs will accommodate large shared on-chip last-level caches. However, the exponential increase in multicore processor cache sizes accompanied by growing on-chip ...
Performance analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec v2.0 Benchmark Suite Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (2009-09)
Restricted access - publisher's policyNon-Uniform Cache Architectures (NUCA)have been proposed as a solution to overcome wire delays that will dominate on-chip latencies in Chip Multiprocessor designs in the near future. This novel means of organization divides ...
Lira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María (Association for Computing Machinery (ACM), 2010)
Restricted access - publisher's policyThe growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs)have been proposed to address this problem. ...
Lira Rueda, Javier; Jones, Timothy M.; Molina, Carlos; González Colás, Antonio María (2012-01)